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Searched refs:SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_shader.cpp374 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in brw_instruction_name()
1135 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in has_side_effects()
Dbrw_fs_visitor.cpp793 opcode = SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT; in emit_urb_writes()
929 if (opcode == SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT) in emit_urb_writes()
Dbrw_eu_defines.h500 SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT, enumerator
Dbrw_ir_performance.cpp924 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in instruction_desc()
Dbrw_fs_generator.cpp865 if (inst->opcode == SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT || in generate_urb_write()
2420 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in generate_code()
Dbrw_fs.cpp228 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in is_send_from_grf()
303 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in is_payload()
979 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in size_read()
1630 prev->opcode == SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT || in emit_gs_thread_end()
7574 case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: in get_lowered_simd_width()
Dbrw_fs_nir.cpp3064 SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT : in nir_emit_tcs_intrinsic()