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Searched refs:SRC1 (Results 1 – 12 of 12) sorted by relevance

/third_party/ffmpeg/libavutil/arm/
Dfloat_dsp_vfp.S79 SRC1 .req a3 label
91 add SRC1, SRC1, LEN, lsl #2
106 vldmdb SRC1!, {s20}
121 vldmdb SRC1!, {s20}
122 vldmdb SRC1!, {s21}
145 vldmdb SRC1!, {s20}
146 vldmdb SRC1!, {s21}
147 vldmdb SRC1!, {s22}
148 vldmdb SRC1!, {s23}
180 vldmdb SRC1!, {s20}
[all …]
/third_party/mesa3d/src/mesa/x86/
Dx86_xform3.S43 #define SRC1 REGOFF(4, ESI) macro
110 FLD_S( SRC1 ) /* F0 F7 F6 F5 F4 */
112 FLD_S( SRC1 ) /* F1 F0 F7 F6 F5 F4 */
114 FLD_S( SRC1 ) /* F2 F1 F0 F7 F6 F5 F4 */
116 FLD_S( SRC1 ) /* F3 F2 F1 F0 F7 F6 F5 F4 */
212 FLD_S( SRC1 ) /* F5 F4 */
296 FLD_S( SRC1 ) /* F0 F6 F5 F4 */
298 FLD_S( SRC1 ) /* F1 F0 F6 F5 F4 */
300 FLD_S( SRC1 ) /* F2 F1 F0 F6 F5 F4 */
387 FLD_S( SRC1 ) /* F1 F4 */
[all …]
Dx86_xform2.S43 #define SRC1 REGOFF(4, ESI) macro
110 FLD_S( SRC1 ) /* F0 F7 F6 F5 F4 */
112 FLD_S( SRC1 ) /* F1 F0 F7 F6 F5 F4 */
114 FLD_S( SRC1 ) /* F2 F1 F0 F7 F6 F5 F4 */
116 FLD_S( SRC1 ) /* F3 F2 F1 F0 F7 F6 F5 F4 */
198 FLD_S( SRC1 ) /* F1 F4 */
265 FLD_S( SRC1 ) /* F0 F6 F5 F4 */
267 FLD_S( SRC1 ) /* F1 F0 F6 F5 F4 */
269 FLD_S( SRC1 ) /* F2 F1 F0 F6 F5 F4 */
346 FLD_S( SRC1 ) /* F1 F4 */
[all …]
Dx86_xform4.S43 #define SRC1 REGOFF(4, ESI) macro
110 FLD_S( SRC1 ) /* F0 F7 F6 F5 F4 */
112 FLD_S( SRC1 ) /* F1 F0 F7 F6 F5 F4 */
114 FLD_S( SRC1 ) /* F2 F1 F0 F7 F6 F5 F4 */
116 FLD_S( SRC1 ) /* F3 F2 F1 F0 F7 F6 F5 F4 */
219 FLD_S( SRC1 ) /* F5 F4 */
306 FLD_S( SRC1 ) /* F0 F6 F5 F4 */
308 FLD_S( SRC1 ) /* F1 F0 F6 F5 F4 */
310 FLD_S( SRC1 ) /* F2 F1 F0 F6 F5 F4 */
405 FLD_S( SRC1 ) /* F5 F4 */
[all …]
Dx86_cliptest.S38 #define SRC1 REGOFF(4, ESI) macro
182 MOV_L( SRC1, EBX )
231 FLD_S( SRC1 ) /* F1 F0 F3 */
348 MOV_L( SRC1, EBX )
/third_party/unity/test/
DMakefile25 SRC1 = ../src/unity.c tests/test_unity_arrays.c build/test_unity_arraysRunner.c macro
42 coverage: $(SRC1) $(SRC2) $(SRC3) $(SRC4) $(SRC5) $(SRC6) $(SRC7) $(SRC8)
44 $(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC1), ../$i) $(COV_FLAGS) -o ../$(TARGET)
100 test: $(SRC1) $(SRC2) $(SRC3) $(SRC4) $(SRC5) $(SRC6) $(SRC7) $(SRC8)
101 $(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC1) -o $(TARGET)
/third_party/mesa3d/docs/drivers/freedreno/
Disaspec.rst120 {SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}
123 <field name="SRC1" low="0" high="15" type="#multisrc">
129 {SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}
133 <field name="SRC1" low="0" high="15" type="#multisrc">
151 You'll notice that ``SRC1`` refers back to a different bitset hierarchy
261 <map name="SRC1">src->regs[1]</map>
/third_party/mesa3d/src/compiler/isaspec/
DREADME.rst120 {SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}
123 <field name="SRC1" low="0" high="15" type="#multisrc">
129 {SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}
133 <field name="SRC1" low="0" high="15" type="#multisrc">
151 You'll notice that ``SRC1`` refers back to a different bitset hierarchy
261 <map name="SRC1">src->regs[1]</map>
/third_party/skia/third_party/externals/libwebp/src/dsp/
Drescaler_neon.c32 #define STORE_32x8(SRC0, SRC1, DST) do { \ argument
34 vst1q_u32((DST) + 4, SRC1); \
/third_party/flutter/skia/third_party/externals/libwebp/src/dsp/
Drescaler_neon.c32 #define STORE_32x8(SRC0, SRC1, DST) do { \ argument
34 vst1q_u32((DST) + 4, SRC1); \
/third_party/ffmpeg/tests/fate/
Dfilter-audio.mak228 …e: CMD = ffmpeg -auto_conversion_filters -filter_complex amix -i $(SRC) -ss 3 -i $(SRC1) -f f32le -
232 … -auto_conversion_filters -filter_complex amix=duration=first -ss 4 -i $(SRC) -i $(SRC1) -f f32le -
238 …-filter_complex amix=inputs=3:dropout_transition=0.5 -i $(SRC) -ss 2 -i $(SRC1) -ss 4 -i $(SRC2) -…
244 $(FATE_AMIX): SRC1 = $(TARGET_PATH)/tests/data/asynth-44100-2-2.wav macro
296 fate-filter-join: SRC1 = $(TARGET_PATH)/tests/data/asynth-44100-2.wav macro
299 fate-filter-join: CMD = md5 -auto_conversion_filters -i $(SRC1) -i $(SRC2) -filter_complex join=cha…
/third_party/mesa3d/src/freedreno/.gitlab-ci/reference/
Des2gears-a320.log226 { SRC1 = 8272 }
265 { SRC1 = 0 }
623 { SRC1 = 0 }
14479 { SRC1 = 4096 }
14760 { SRC1 = 8272 }
14815 { SRC1 = 4096 }