Searched refs:STENCILOP_ZERO (Results 1 – 15 of 15) sorted by relevance
97 return STENCILOP_ZERO; in intel_translate_stencil_op()111 return STENCILOP_ZERO; in intel_translate_stencil_op()
375 #define STENCILOP_ZERO 0x1 macro
111 fop = STENCILOP_ZERO; in i830StencilOpSeparate()139 dfop = STENCILOP_ZERO; in i830StencilOpSeparate()167 dpop = STENCILOP_ZERO; in i830StencilOpSeparate()
93 return STENCILOP_ZERO; in i915_translate_stencil_op()107 return STENCILOP_ZERO; in i915_translate_stencil_op()
903 #define STENCILOP_ZERO 0x1 macro
108 STENCILOP_ZERO, enumerator
151 case STENCILOP_ZERO: SAMPLE_REGISTER_SFAIL(0) break; in executeStencilSFail()339 case STENCILOP_ZERO: SAMPLE_REGISTER_DPFAIL_OR_DPPASS(CONDITION, 0) break; \ in executeStencilDpFailAndPass()
189 return STENCILOP_ZERO; in swr_convert_stencil_op()
238 case GL_ZERO: return rr::STENCILOP_ZERO; in mapGLStencilOp()
44 case STENCILOP_ZERO: in StencilOp()
480 STENCILOP_ZERO, enumerator
132 case VK_STENCIL_OP_ZERO: return rr::STENCILOP_ZERO; in mapVkStencilOp()
933 [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO,
170 PIPE_ASSERT(PIPE_STENCIL_OP_ZERO == STENCILOP_ZERO); in pipe_asserts()
171 PIPE_ASSERT(PIPE_STENCIL_OP_ZERO == STENCILOP_ZERO); in pipe_asserts()