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Searched refs:ShiftAmt (Results 1 – 25 of 53) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
DDemandedBits.cpp162 uint64_t ShiftAmt = SA->urem(BitWidth); in determineLiveOperandBits() local
164 ShiftAmt = BitWidth - ShiftAmt; in determineLiveOperandBits()
167 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
169 AB = AOut.shl(BitWidth - ShiftAmt); in determineLiveOperandBits()
187 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
188 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
194 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in determineLiveOperandBits()
196 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
204 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
205 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
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DValueTracking.cpp967 unsigned ShiftAmt = SA->getLimitedValue(BitWidth-1); in computeKnownBitsFromShiftOperator() local
970 Known.Zero = KZF(Known.Zero, ShiftAmt); in computeKnownBitsFromShiftOperator()
971 Known.One = KOF(Known.One, ShiftAmt); in computeKnownBitsFromShiftOperator()
1018 for (unsigned ShiftAmt = 0; ShiftAmt < BitWidth; ++ShiftAmt) { in computeKnownBitsFromShiftOperator() local
1021 if ((ShiftAmt & ~ShiftAmtKZ) != ShiftAmt) in computeKnownBitsFromShiftOperator()
1023 if ((ShiftAmt | ShiftAmtKO) != ShiftAmt) in computeKnownBitsFromShiftOperator()
1028 if (ShiftAmt == 0) { in computeKnownBitsFromShiftOperator()
1036 Known.Zero &= KZF(Known2.Zero, ShiftAmt); in computeKnownBitsFromShiftOperator()
1037 Known.One &= KOF(Known2.One, ShiftAmt); in computeKnownBitsFromShiftOperator()
1240 auto KZF = [NSW](const APInt &KnownZero, unsigned ShiftAmt) { in computeKnownBitsFromOperator() argument
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DConstantFolding.cpp214 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1); in FoldBitCast() local
229 ConstantInt::get(Src->getType(), ShiftAmt)); in FoldBitCast()
230 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize; in FoldBitCast()
261 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1); in FoldBitCast() local
266 ConstantInt::get(Src->getType(), ShiftAmt)); in FoldBitCast()
267 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize; in FoldBitCast()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ExpandImm.cpp71 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
74 for (; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
75 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
83 AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt) }); in tryToreplicateChunks()
91 for (ShiftAmt += 16; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
92 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
98 AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt) }); in tryToreplicateChunks()
DAArch64ConditionOptimizer.cpp174 unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm()); in findSuitableCompare() local
178 } else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) { in findSuitableCompare()
DAArch64ISelDAGToDAG.cpp343 unsigned ShiftAmt; in SelectArithImmed() local
346 ShiftAmt = 0; in SelectArithImmed()
348 ShiftAmt = 12; in SelectArithImmed()
353 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed()
2020 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
2021 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
2023 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
2028 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
2029 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
2031 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/
DAPInt.h205 void shlSlowCase(unsigned ShiftAmt);
208 void lshrSlowCase(unsigned ShiftAmt);
211 void ashrSlowCase(unsigned ShiftAmt);
921 APInt &operator<<=(unsigned ShiftAmt) {
922 assert(ShiftAmt <= BitWidth && "Invalid shift amount");
924 if (ShiftAmt == BitWidth)
927 U.VAL <<= ShiftAmt;
930 shlSlowCase(ShiftAmt);
939 APInt &operator<<=(const APInt &ShiftAmt);
963 APInt ashr(unsigned ShiftAmt) const { in ashr() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineSimplifyDemanded.cpp505 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
506 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); in SimplifyDemandedUseBits()
511 DemandedMaskIn.setHighBits(ShiftAmt+1); in SimplifyDemandedUseBits()
513 DemandedMaskIn.setHighBits(ShiftAmt); in SimplifyDemandedUseBits()
518 Known.Zero <<= ShiftAmt; in SimplifyDemandedUseBits()
519 Known.One <<= ShiftAmt; in SimplifyDemandedUseBits()
521 if (ShiftAmt) in SimplifyDemandedUseBits()
522 Known.Zero.setLowBits(ShiftAmt); in SimplifyDemandedUseBits()
529 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
532 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt)); in SimplifyDemandedUseBits()
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DInstCombineCasts.cpp794 unsigned ShiftAmt = Cst->getZExtValue(); in visitTrunc() local
801 if (ShiftAmt <= MaxAmt) { in visitTrunc()
804 std::min(ShiftAmt, ASize - 1))); in visitTrunc()
806 Value *Shift = Builder.CreateAShr(A, std::min(ShiftAmt, ASize - 1)); in visitTrunc()
1038 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local
1039 BitsToClear = ShiftAmt < BitsToClear ? BitsToClear - ShiftAmt : 0; in canEvaluateZExtd()
1273 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local
1275 if (ShiftAmt) in transformSExtICmp()
1277 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
1287 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
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DInstCombineCompares.cpp2030 const APInt *ShiftAmt; in foldICmpShlConstant() local
2031 if (!match(Shl->getOperand(1), m_APInt(ShiftAmt))) in foldICmpShlConstant()
2037 if (ShiftAmt->uge(TypeBits)) in foldICmpShlConstant()
2050 APInt ShiftedC = C.ashr(*ShiftAmt); in foldICmpShlConstant()
2054 C.ashr(*ShiftAmt).shl(*ShiftAmt) == C) { in foldICmpShlConstant()
2055 APInt ShiftedC = C.ashr(*ShiftAmt); in foldICmpShlConstant()
2064 APInt ShiftedC = (C - 1).ashr(*ShiftAmt) + 1; in foldICmpShlConstant()
2080 APInt ShiftedC = C.lshr(*ShiftAmt); in foldICmpShlConstant()
2084 C.lshr(*ShiftAmt).shl(*ShiftAmt) == C) { in foldICmpShlConstant()
2085 APInt ShiftedC = C.lshr(*ShiftAmt); in foldICmpShlConstant()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAtomicExpandPass.cpp616 Value *ShiftAmt; member
669 Ret.ShiftAmt = Builder.CreateShl(PtrLSB, 3); in createMaskInstrs()
672 Ret.ShiftAmt = in createMaskInstrs()
676 Ret.ShiftAmt = Builder.CreateTrunc(Ret.ShiftAmt, Ret.WordType, "ShiftAmt"); in createMaskInstrs()
678 ConstantInt::get(Ret.WordType, (1 << (ValueSize * 8)) - 1), Ret.ShiftAmt, in createMaskInstrs()
723 Builder.CreateLShr(Loaded, PMV.ShiftAmt), PMV.ValueType); in performMaskedAtomicOp()
726 Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in performMaskedAtomicOp()
757 PMV.ShiftAmt, "ValOperand_Shifted"); in expandPartwordAtomicRMW()
770 Builder.CreateLShr(OldResult, PMV.ShiftAmt), PMV.ValueType); in expandPartwordAtomicRMW()
790 PMV.ShiftAmt, "ValOperand_Shifted"); in widenPartwordAtomicRMW()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DVNCoercion.cpp118 uint64_t ShiftAmt = DL.getTypeStoreSizeInBits(StoredValTy) - in coerceAvailableValueToLoadTypeHelper() local
121 StoredVal, ConstantInt::get(StoredVal->getType(), ShiftAmt)); in coerceAvailableValueToLoadTypeHelper()
368 unsigned ShiftAmt; in getStoreValueForLoadHelper() local
370 ShiftAmt = Offset * 8; in getStoreValueForLoadHelper()
372 ShiftAmt = (StoreSize - LoadSize - Offset) * 8; in getStoreValueForLoadHelper()
373 if (ShiftAmt) in getStoreValueForLoadHelper()
375 ConstantInt::get(SrcVal->getType(), ShiftAmt)); in getStoreValueForLoadHelper()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1708 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToScaledMask() local
1709 if (ShiftAmt != 1 && ShiftAmt != 2 && ShiftAmt != 3) in foldMaskedShiftToScaledMask()
1720 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, DL, VT); in foldMaskedShiftToScaledMask()
1735 AM.Scale = 1 << ShiftAmt; in foldMaskedShiftToScaledMask()
1775 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskAndShiftToScale() local
1792 unsigned ScaleDown = (64 - X.getSimpleValueType().getSizeInBits()) + ShiftAmt; in foldMaskAndShiftToScale()
1829 SDValue NewSRLAmt = DAG.getConstant(ShiftAmt + AMShiftAmt, DL, MVT::i8); in foldMaskAndShiftToScale()
1872 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToBEXTR() local
1884 SDValue NewSRLAmt = DAG.getConstant(ShiftAmt + AMShiftAmt, DL, MVT::i8); in foldMaskedShiftToBEXTR()
3335 auto matchShiftAmt = [checkOneUse, &NBits](SDValue ShiftAmt, in matchBitExtract()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp676 auto ShiftAmt = in narrowScalar() local
678 auto Shift = MIRBuilder.buildAShr(NarrowTy, SrcReg, ShiftAmt); in narrowScalar()
1212 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); in widenScalarMergeValues() local
1213 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt); in widenScalarMergeValues()
1321 auto ShiftAmt = MIRBuilder.buildConstant(NewSrcTy, SizeDiff * I); in widenScalarUnmergeValues() local
1322 auto Shl = MIRBuilder.buildShl(NewSrcTy, WideSrc, ShiftAmt); in widenScalarUnmergeValues()
1549 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits); in widenScalar() local
1550 auto Shift = MIRBuilder.buildLShr(WideTy, DstExt, ShiftAmt); in widenScalar()
1992 Register ShiftAmt = MRI.createGenericVirtualRegister(Ty); in lower() local
1993 MIRBuilder.buildConstant(ShiftAmt, Ty.getSizeInBits() - 1); in lower()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceInstARM32.h114 uint16_t ShiftAmt = 0,
117 OperandARM32Mem(Func, Ty, Base, Index, ShiftOp, ShiftAmt, Mode);
123 uint16_t getShiftAmt() const { return ShiftAmt; } in getShiftAmt()
154 ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode);
160 uint16_t ShiftAmt; variable
310 ShiftKind ShiftOp, Operand *ShiftAmt) { in create() argument
312 OperandARM32FlexReg(Func, Ty, Reg, ShiftOp, ShiftAmt); in create()
326 Operand *getShiftAmt() const { return ShiftAmt; } in getShiftAmt()
330 Operand *ShiftAmt);
334 Operand *ShiftAmt; variable
DIceInstARM32.cpp323 ShiftOp(kNoShift), ShiftAmt(0), Mode(Mode) { in OperandARM32Mem()
332 uint16_t ShiftAmt, AddrMode Mode) in OperandARM32Mem() argument
334 ShiftOp(ShiftOp), ShiftAmt(ShiftAmt), Mode(Mode) { in OperandARM32Mem()
471 ShiftKind ShiftOp, Operand *ShiftAmt) in OperandARM32FlexReg() argument
473 ShiftAmt(ShiftAmt) { in OperandARM32FlexReg()
475 auto *ShiftVar = llvm::dyn_cast_or_null<Variable>(ShiftAmt); in OperandARM32FlexReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp1800 auto ShiftAmt = B.buildConstant(S32, 31); in applyMappingImpl() local
1801 MRI.setRegBank(ShiftAmt.getReg(0), *SrcBank); in applyMappingImpl()
1802 B.buildAShr(DefRegs[1], DefRegs[0], ShiftAmt); in applyMappingImpl()
1854 auto ShiftAmt = B.buildConstant(LLT::scalar(32), DstTy.getSizeInBits() - 1); in applyMappingImpl() local
1855 auto Shl = B.buildShl(DstTy, Ext, ShiftAmt); in applyMappingImpl()
1858 B.buildAShr(DstReg, Shl, ShiftAmt); in applyMappingImpl()
1860 B.buildLShr(DstReg, Shl, ShiftAmt); in applyMappingImpl()
1864 MRI.setRegBank(ShiftAmt.getReg(0), *SrcBank); in applyMappingImpl()
1906 auto ShiftAmt = B.buildConstant(S32, 16); in applyMappingImpl() local
1907 MRI.setRegBank(ShiftAmt.getReg(0), *BankHi); in applyMappingImpl()
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DR600ISelLowering.cpp1188 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateTruncStore() local
1201 MaskedValue, ShiftAmt); in lowerPrivateTruncStore()
1204 SDValue DstMask = DAG.getNode(ISD::SHL, DL, MVT::i32, Mask, ShiftAmt); in lowerPrivateTruncStore()
1416 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateExtLoad() local
1420 SDValue Ret = DAG.getNode(ISD::SRL, DL, MVT::i32, Read, ShiftAmt); in lowerPrivateExtLoad()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DAPInt.cpp991 void APInt::ashrSlowCase(unsigned ShiftAmt) { in ashrSlowCase() argument
993 if (!ShiftAmt) in ashrSlowCase()
1000 unsigned WordShift = ShiftAmt / APINT_BITS_PER_WORD; in ashrSlowCase()
1001 unsigned BitShift = ShiftAmt % APINT_BITS_PER_WORD; in ashrSlowCase()
1040 void APInt::lshrSlowCase(unsigned ShiftAmt) { in lshrSlowCase() argument
1041 tcShiftRight(U.pVal, getNumWords(), ShiftAmt); in lshrSlowCase()
1052 void APInt::shlSlowCase(unsigned ShiftAmt) { in shlSlowCase() argument
1053 tcShiftLeft(U.pVal, getNumWords(), ShiftAmt); in shlSlowCase()
2260 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); in toString() local
2266 Tmp.lshrInPlace(ShiftAmt); in toString()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/
DSCCP.cpp1594 if (auto *ShiftAmt = Op1LV.getConstantInt()) in ResolvedUndefsIn() local
1595 if (ShiftAmt->getLimitedValue() >= in ResolvedUndefsIn()
1596 ShiftAmt->getType()->getScalarSizeInBits()) in ResolvedUndefsIn()
1611 if (auto *ShiftAmt = Op1LV.getConstantInt()) in ResolvedUndefsIn() local
1612 if (ShiftAmt->getLimitedValue() >= in ResolvedUndefsIn()
1613 ShiftAmt->getType()->getScalarSizeInBits()) in ResolvedUndefsIn()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h212 Value *Mask, Value *ShiftAmt, AtomicOrdering Ord) const override;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsFastISel.cpp1834 unsigned ShiftAmt; in emitIntSExt32r1() local
1839 ShiftAmt = 24; in emitIntSExt32r1()
1842 ShiftAmt = 16; in emitIntSExt32r1()
1846 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1847 emitInst(Mips::SRA, DestReg).addReg(TempReg).addImm(ShiftAmt); in emitIntSExt32r1()
DMipsISelLowering.cpp1665 Register ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1788 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicBinaryPartword()
1793 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicBinaryPartword()
1798 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicBinaryPartword()
1800 BuildMI(BB, DL, TII->get(Mips::SLLV), Incr2).addReg(Incr).addReg(ShiftAmt); in emitAtomicBinaryPartword()
1814 .addReg(ShiftAmt) in emitAtomicBinaryPartword()
1914 Register ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1975 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicCmpSwapPartword()
1980 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicCmpSwapPartword()
1985 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicCmpSwapPartword()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/Interpreter/
DExecution.cpp1615 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize * (Ratio - 1); in executeBitCastInst() local
1621 Tmp <<= ShiftAmt; in executeBitCastInst()
1622 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize; in executeBitCastInst()
1631 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize * (Ratio - 1); in executeBitCastInst() local
1636 Elt.IntVal.lshrInPlace(ShiftAmt); in executeBitCastInst()
1640 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize; in executeBitCastInst()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp1242 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits() local
1246 for (unsigned i = ShiftAmt; i < NumBits; ++i) in getValueBits()
1247 Bits[i] = LHSBits[i - ShiftAmt]; in getValueBits()
1249 for (unsigned i = 0; i < ShiftAmt; ++i) in getValueBits()
1257 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits() local
1261 for (unsigned i = 0; i < NumBits - ShiftAmt; ++i) in getValueBits()
1262 Bits[i] = LHSBits[i + ShiftAmt]; in getValueBits()
1264 for (unsigned i = NumBits - ShiftAmt; i < NumBits; ++i) in getValueBits()
4602 SDValue ShiftAmt = in Select() local
4609 N0, ShiftAmt); in Select()
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