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Searched refs:SrcReg (Results 1 – 25 of 210) sorted by relevance

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/third_party/mesa3d/src/mesa/program/
Dprogramopt.c93 newInst[i].SrcReg[0].File = PROGRAM_STATE_VAR; in insert_mvp_dp4_code()
94 newInst[i].SrcReg[0].Index = mvpRef[i]; in insert_mvp_dp4_code()
95 newInst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP; in insert_mvp_dp4_code()
96 newInst[i].SrcReg[1].File = PROGRAM_INPUT; in insert_mvp_dp4_code()
97 newInst[i].SrcReg[1].Index = VERT_ATTRIB_POS; in insert_mvp_dp4_code()
98 newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP; in insert_mvp_dp4_code()
164 newInst[0].SrcReg[0].File = PROGRAM_INPUT; in insert_mvp_mad_code()
165 newInst[0].SrcReg[0].Index = VERT_ATTRIB_POS; in insert_mvp_mad_code()
166 newInst[0].SrcReg[0].Swizzle = SWIZZLE_XXXX; in insert_mvp_mad_code()
167 newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR; in insert_mvp_mad_code()
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Dprog_opt_constant_fold.c39 if (inst->SrcReg[i].File != PROGRAM_CONSTANT) in src_regs_are_constant()
41 if (inst->SrcReg[i].RelAddr) in src_regs_are_constant()
141 get_value(prog, &inst->SrcReg[0], a); in _mesa_constant_fold()
142 get_value(prog, &inst->SrcReg[1], b); in _mesa_constant_fold()
150 inst->SrcReg[0] = src_reg_for_vec4(prog, result); in _mesa_constant_fold()
152 inst->SrcReg[1].File = PROGRAM_UNDEFINED; in _mesa_constant_fold()
153 inst->SrcReg[1].Swizzle = SWIZZLE_NOOP; in _mesa_constant_fold()
170 get_value(prog, &inst->SrcReg[0], a); in _mesa_constant_fold()
171 get_value(prog, &inst->SrcReg[1], b); in _mesa_constant_fold()
172 get_value(prog, &inst->SrcReg[2], c); in _mesa_constant_fold()
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Dprog_parameter_layout.c159 if (inst->SrcReg[i].Base.RelAddr) { in _mesa_layout_parameters()
162 if (!inst->SrcReg[i].Symbol->pass1_done) { in _mesa_layout_parameters()
165 inst->SrcReg[i].Symbol->param_binding_begin, in _mesa_layout_parameters()
166 inst->SrcReg[i].Symbol->param_binding_length); in _mesa_layout_parameters()
173 inst->SrcReg[i].Symbol->param_binding_begin = new_begin; in _mesa_layout_parameters()
174 inst->SrcReg[i].Symbol->pass1_done = 1; in _mesa_layout_parameters()
181 inst->Base.SrcReg[i] = inst->SrcReg[i].Base; in _mesa_layout_parameters()
182 inst->Base.SrcReg[i].Index += in _mesa_layout_parameters()
183 inst->SrcReg[i].Symbol->param_binding_begin; in _mesa_layout_parameters()
193 const int idx = inst->SrcReg[i].Base.Index; in _mesa_layout_parameters()
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Dprog_execute.c304 inst->SrcReg[0].File == PROGRAM_INPUT && in fetch_texel()
305 inst->SrcReg[0].Index == VARYING_SLOT_TEX0 + inst->TexSrcUnit) { in fetch_texel()
307 GLuint attr = inst->SrcReg[0].Index; in fetch_texel()
408 fetch_vector4(&inst->SrcReg[0], machine, a); in _mesa_execute_program()
419 fetch_vector4(&inst->SrcReg[0], machine, a); in _mesa_execute_program()
420 fetch_vector4(&inst->SrcReg[1], machine, b); in _mesa_execute_program()
436 fetch_vector4(&inst->SrcReg[0], machine, t); in _mesa_execute_program()
484 fetch_vector4(&inst->SrcReg[0], machine, a); in _mesa_execute_program()
485 fetch_vector4(&inst->SrcReg[1], machine, b); in _mesa_execute_program()
486 fetch_vector4(&inst->SrcReg[2], machine, c); in _mesa_execute_program()
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Dprog_optimize.c107 const GLuint coord = GET_SWZ(inst->SrcReg[arg].Swizzle, comp); in get_src_arg_mask()
133 src_comp = GET_SWZ(mov->SrcReg[0].Swizzle, comp); in get_dst_mask_for_mov()
218 if (inst->SrcReg[j].File == file) { in replace_regs()
219 GLuint index = inst->SrcReg[j].Index; in replace_regs()
221 inst->SrcReg[j].Index = map[index]; in replace_regs()
264 if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) { in _mesa_remove_dead_code_global()
265 const GLuint index = inst->SrcReg[j].Index; in _mesa_remove_dead_code_global()
270 if (inst->SrcReg[j].RelAddr) { in _mesa_remove_dead_code_global()
277 const GLuint swz = GET_SWZ(inst->SrcReg[j].Swizzle, comp); in _mesa_remove_dead_code_global()
389 if (inst->SrcReg[j].RelAddr || in find_next_use()
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Dprog_instruction.c48 inst[i].SrcReg[0].File = PROGRAM_UNDEFINED; in _mesa_init_instructions()
49 inst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP; in _mesa_init_instructions()
50 inst[i].SrcReg[1].File = PROGRAM_UNDEFINED; in _mesa_init_instructions()
51 inst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP; in _mesa_init_instructions()
52 inst[i].SrcReg[2].File = PROGRAM_UNDEFINED; in _mesa_init_instructions()
53 inst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP; in _mesa_init_instructions()
223 if (inst->SrcReg[i].File == inst->DstReg.File && in _mesa_check_soa_dependencies()
224 inst->SrcReg[i].Index == inst->DstReg.Index) { in _mesa_check_soa_dependencies()
230 GLuint swizzle = GET_SWZ(inst->SrcReg[i].Swizzle, chan); in _mesa_check_soa_dependencies()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.h26 inline static unsigned getCRFromCRBit(unsigned SrcReg) { in getCRFromCRBit() argument
28 if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || in getCRFromCRBit()
29 SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) in getCRFromCRBit()
31 else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || in getCRFromCRBit()
32 SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) in getCRFromCRBit()
34 else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || in getCRFromCRBit()
35 SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) in getCRFromCRBit()
37 else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT || in getCRFromCRBit()
38 SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) in getCRFromCRBit()
40 else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT || in getCRFromCRBit()
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/third_party/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_program_tex.c70 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; in scale_texcoords()
71 inst_mov->U.I.SrcReg[1].File = RC_FILE_CONSTANT; in scale_texcoords()
72 inst_mov->U.I.SrcReg[1].Index = in scale_texcoords()
76 reset_srcreg(&inst->U.I.SrcReg[0]); in scale_texcoords()
77 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; in scale_texcoords()
78 inst->U.I.SrcReg[0].Index = temp; in scale_texcoords()
93 inst_rcp->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; in projective_divide()
96 inst_rcp->U.I.SrcReg[0].Swizzle = in projective_divide()
97 RC_MAKE_SWIZZLE_SMEAR(GET_SWZ(inst->U.I.SrcReg[0].Swizzle, 3)); in projective_divide()
103 inst_mul->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; in projective_divide()
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Dradeon_optimize.c76 &reader_data->Writer->U.I.PreSub.SrcReg[0], in copy_propagate_scan_read()
77 &reader_data->Writer->U.I.PreSub.SrcReg[1])) { in copy_propagate_scan_read()
91 if(reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_TEMPORARY && in copy_propagate_scan_read()
92 reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_INPUT && in copy_propagate_scan_read()
166 inst->U.I.SrcReg[0].File == RC_FILE_PRESUB || in copy_propagate()
167 inst->U.I.SrcReg[0].Abs || in copy_propagate()
168 inst->U.I.SrcReg[0].Negate) { in copy_propagate()
177 …_data.Readers[i].U.I.Src = chain_srcregs(*reader_data.Readers[i].U.I.Src, inst_mov->U.I.SrcReg[0]); in copy_propagate()
179 if (inst_mov->U.I.SrcReg[0].File == RC_FILE_PRESUB) in copy_propagate()
232 if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) { in constant_folding_mad()
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Dr3xx_vertprog.c46 (PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[x]), \
51 t_src_class(vpi->SrcReg[x].File), \
52 RC_MASK_NONE) | (vpi->SrcReg[x].RelAddr << 4))
201 inst[1] = t_src(vp, &vpi->SrcReg[0]); in ei_vector1()
218 inst[1] = t_src(vp, &vpi->SrcReg[0]); in ei_vector2()
219 inst[2] = t_src(vp, &vpi->SrcReg[1]); in ei_vector2()
235 inst[1] = t_src_scalar(vp, &vpi->SrcReg[0]); in ei_math1()
254 …inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[0]), t_swizzle(GET_SWZ(vpi->SrcReg[0].Swizz… in ei_lit()
255 t_swizzle(GET_SWZ(vpi->SrcReg[0].Swizzle, 3)), // W in ei_lit()
257 t_swizzle(GET_SWZ(vpi->SrcReg[0].Swizzle, 1)), // Y in ei_lit()
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Dradeon_pair_translate.c46 inst->SrcReg[2] = inst->SrcReg[1]; in final_rewrite()
47 inst->SrcReg[1].File = RC_FILE_NONE; in final_rewrite()
48 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; in final_rewrite()
49 inst->SrcReg[1].Negate = RC_MASK_NONE; in final_rewrite()
53 tmp = inst->SrcReg[2]; in final_rewrite()
54 inst->SrcReg[2] = inst->SrcReg[0]; in final_rewrite()
55 inst->SrcReg[0] = tmp; in final_rewrite()
68 inst->SrcReg[1].File = RC_FILE_NONE; in final_rewrite()
69 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; in final_rewrite()
70 inst->SrcReg[2].File = RC_FILE_NONE; in final_rewrite()
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Dradeon_compiler.c125 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT) in rc_calculate_inputs_outputs()
126 c->Program.InputsRead |= 1U << inst->U.I.SrcReg[i].Index; in rc_calculate_inputs_outputs()
151 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT && inst->U.I.SrcReg[i].Index == input) { in rc_move_input()
152 inst->U.I.SrcReg[i].File = new_input.File; in rc_move_input()
153 inst->U.I.SrcReg[i].Index = new_input.Index; in rc_move_input()
154 inst->U.I.SrcReg[i].Swizzle = combine_swizzles(new_input.Swizzle, inst->U.I.SrcReg[i].Swizzle); in rc_move_input()
155 if (!inst->U.I.SrcReg[i].Abs) { in rc_move_input()
156 inst->U.I.SrcReg[i].Negate ^= new_input.Negate; in rc_move_input()
157 inst->U.I.SrcReg[i].Abs = new_input.Abs; in rc_move_input()
217 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; in rc_copy_output()
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Dradeon_program_alu.c45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) in emit1() argument
55 fpi->U.I.SrcReg[0] = SrcReg; in emit1()
73 fpi->U.I.SrcReg[0] = SrcReg0; in emit2()
74 fpi->U.I.SrcReg[1] = SrcReg1; in emit2()
93 fpi->U.I.SrcReg[0] = SrcReg0; in emit3()
94 fpi->U.I.SrcReg[1] = SrcReg1; in emit3()
95 fpi->U.I.SrcReg[2] = SrcReg2; in emit3()
208 if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY && in is_dst_safe_to_reuse()
209 inst->U.I.SrcReg[i].Index == inst->U.I.DstReg.Index) in is_dst_safe_to_reuse()
232 struct rc_src_register src = inst->U.I.SrcReg[0]; in transform_ABS()
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Dradeon_vert_fc.c131 new_inst->U.I.SrcReg[0].Index = 0; in lower_bgnloop()
132 new_inst->U.I.SrcReg[0].File = RC_FILE_NONE; in lower_bgnloop()
133 new_inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000; in lower_bgnloop()
141 build_pred_src(&new_inst->U.I.SrcReg[0], fc_state); in lower_bgnloop()
151 new_inst->U.I.SrcReg[1].Index = 0; in lower_bgnloop()
152 new_inst->U.I.SrcReg[1].File = RC_FILE_NONE; in lower_bgnloop()
153 new_inst->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_0000; in lower_bgnloop()
165 inst->U.I.SrcReg[0].Index = 0; in lower_brk()
166 inst->U.I.SrcReg[0].File = RC_FILE_NONE; in lower_brk()
167 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000; in lower_brk()
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Dradeon_emulate_loops.c100 if(!rc_src_reg_is_immediate(value->C, inst->U.I.SrcReg[0].File, in update_const_value()
101 inst->U.I.SrcReg[0].Index)){ in update_const_value()
107 inst->U.I.SrcReg[0].Index, in update_const_value()
108 inst->U.I.SrcReg[0].Swizzle, in update_const_value()
109 inst->U.I.SrcReg[0].Negate, 0); in update_const_value()
141 if(inst->U.I.SrcReg[0].File == RC_FILE_TEMPORARY && in get_incr_amount()
142 inst->U.I.SrcReg[0].Index == count_inst->Index && in get_incr_amount()
143 inst->U.I.SrcReg[0].Swizzle == count_inst->Swz){ in get_incr_amount()
145 } else if( inst->U.I.SrcReg[1].File == RC_FILE_TEMPORARY && in get_incr_amount()
146 inst->U.I.SrcReg[1].Index == count_inst->Index && in get_incr_amount()
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Dradeon_emulate_branches.c79 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; in handle_if()
81 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; in handle_if()
82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index; in handle_if()
83 inst->U.I.SrcReg[0].Swizzle = 0; in handle_if()
84 inst->U.I.SrcReg[0].Abs = 0; in handle_if()
85 inst->U.I.SrcReg[0].Negate = 0; in handle_if()
169 inst_mov->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; in allocate_and_insert_proxies()
170 inst_mov->U.I.SrcReg[0].Index = index; in allocate_and_insert_proxies()
188 inst_cmp->U.I.SrcReg[0] = inst_if->U.I.SrcReg[0]; in inject_cmp()
189 inst_cmp->U.I.SrcReg[0].Abs = 1; in inject_cmp()
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Dradeon_dataflow_swizzles.c49 if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) in rewrite_source()
53 c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split); in rewrite_source()
64 mov->U.I.SrcReg[0] = inst->U.I.SrcReg[src]; in rewrite_source()
70 SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); in rewrite_source()
72 phase_refmask |= 1 << GET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan); in rewrite_source()
77 masked_negate = split.Phase[phase] & mov->U.I.SrcReg[0].Negate; in rewrite_source()
79 mov->U.I.SrcReg[0].Negate = 0; in rewrite_source()
81 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; in rewrite_source()
85 inst->U.I.SrcReg[src].File = RC_FILE_TEMPORARY; in rewrite_source()
86 inst->U.I.SrcReg[src].Index = tempreg; in rewrite_source()
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Dradeon_program_print.c204 rc_print_register(f, inst.SrcReg[0].File, in rc_print_presub_instruction()
205 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr); in rc_print_presub_instruction()
208 rc_print_register(f, inst.SrcReg[1].File, in rc_print_presub_instruction()
209 inst.SrcReg[1].Index,inst.SrcReg[1].RelAddr); in rc_print_presub_instruction()
211 rc_print_register(f, inst.SrcReg[0].File, in rc_print_presub_instruction()
212 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr); in rc_print_presub_instruction()
215 rc_print_register(f, inst.SrcReg[1].File, in rc_print_presub_instruction()
216 inst.SrcReg[1].Index,inst.SrcReg[1].RelAddr); in rc_print_presub_instruction()
218 rc_print_register(f, inst.SrcReg[0].File, in rc_print_presub_instruction()
219 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr); in rc_print_presub_instruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp140 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
143 Register::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
147 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction()
161 Register SrcReg = Src2.getReg(); in runOnMachineFunction() local
162 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction()
178 Register SrcReg = Src1.getReg(); in runOnMachineFunction() local
180 std::make_pair(*&SrcReg, Hexagon::isub_hi); in runOnMachineFunction()
189 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
192 Register::isVirtualRegister(SrcReg)) { in runOnMachineFunction()
196 PeepholeMap[DstReg] = SrcReg; in runOnMachineFunction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb1InstrInfo.cpp41 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() argument
46 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && in copyPhysReg()
49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
52 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
62 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
70 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
79 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
83 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) && in storeRegToStackSlot()
87 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
97 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
/third_party/mesa3d/src/mesa/drivers/dri/r200/
Dr200_fragshader.c172 inst->SrcReg[optype][0], 1, &tfactor); in r200UpdateFSArith()
174 inst->SrcReg[optype][1], 2, &tfactor); in r200UpdateFSArith()
182 inst->SrcReg[optype][0], 2, &tfactor); in r200UpdateFSArith()
187 inst->SrcReg[optype][2], 2, &tfactor); in r200UpdateFSArith()
191 inst->SrcReg[optype][0], 0, &tfactor); in r200UpdateFSArith()
193 inst->SrcReg[optype][1], 1, &tfactor); in r200UpdateFSArith()
199 inst->SrcReg[optype][0], 2, &tfactor); in r200UpdateFSArith()
201 inst->SrcReg[optype][1], 1, &tfactor); in r200UpdateFSArith()
203 inst->SrcReg[optype][2], 0, &tfactor); in r200UpdateFSArith()
208 inst->SrcReg[optype][0], 0, &tfactor); in r200UpdateFSArith()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp191 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
203 SrcReg = MCI.getOperand(1).getReg(); in getDuplexCandidateGroup()
207 if (HexagonMCInstrInfo::isIntReg(SrcReg) && in getDuplexCandidateGroup()
208 Hexagon::R29 == SrcReg && inRange<5, 2>(MCI, 2)) { in getDuplexCandidateGroup()
212 if (HexagonMCInstrInfo::isIntRegForSubInst(SrcReg) && in getDuplexCandidateGroup()
221 SrcReg = MCI.getOperand(1).getReg(); in getDuplexCandidateGroup()
223 HexagonMCInstrInfo::isIntRegForSubInst(SrcReg) && in getDuplexCandidateGroup()
242 SrcReg = MCI.getOperand(1).getReg(); in getDuplexCandidateGroup()
244 HexagonMCInstrInfo::isIntRegForSubInst(SrcReg) && in getDuplexCandidateGroup()
252 SrcReg = MCI.getOperand(1).getReg(); in getDuplexCandidateGroup()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp34 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() argument
35 if (BPF::GPRRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
37 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
38 else if (BPF::GPR32RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
40 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
47 Register SrcReg = MI->getOperand(1).getReg(); in expandMEMCPY() local
79 .addReg(ScratchReg, RegState::Define).addReg(SrcReg) in expandMEMCPY()
93 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
100 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
107 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.cpp308 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() argument
321 if (SP::IntRegsRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
323 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
324 else if (SP::IntPairRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
329 } else if (SP::FPRegsRegClass.contains(DestReg, SrcReg)) in copyPhysReg()
331 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
332 else if (SP::DFPRegsRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
335 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
342 } else if (SP::QFPRegsRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
346 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRExpandPseudoInsts.cpp146 Register SrcReg = MI.getOperand(2).getReg(); in expandArith() local
151 TRI->splitReg(SrcReg, SrcLoReg, SrcHiReg); in expandArith()
179 Register SrcReg = MI.getOperand(2).getReg(); in expandLogic() local
184 TRI->splitReg(SrcReg, SrcLoReg, SrcHiReg); in expandLogic()
423 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
429 TRI->splitReg(SrcReg, SrcLoReg, SrcHiReg); in expand()
456 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
462 TRI->splitReg(SrcReg, SrcLoReg, SrcHiReg); in expand()
585 unsigned SrcReg = MI.getOperand(1).getReg(); in expand() local
592 if (DstReg == SrcReg) in expand()
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