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Searched refs:TEX_CMD_0 (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_context.h137 #define TEX_CMD_0 0 macro
Dradeon_state_init.c605 rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_TXFILTER_0); in radeonInitState()
607 rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_TXFILTER_1); in radeonInitState()
609 rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_TXFILTER_2); in radeonInitState()
Dradeon_texstate.c718 uint32_t *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0]; in import_tex_obj_state()
/third_party/mesa3d/src/mesa/drivers/dri/r200/
Dr200_state_init.c775 rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_0); in r200InitState()
777 rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_1); in r200InitState()
779 rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_2); in r200InitState()
781 rmesa->hw.tex[3].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_3); in r200InitState()
783 rmesa->hw.tex[4].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_4); in r200InitState()
785 rmesa->hw.tex[5].cmd[TEX_CMD_0] = cmdpkt(rmesa, R200_EMIT_PP_TXCTLALL_5); in r200InitState()
Dr200_context.h160 #define TEX_CMD_0 0 macro
Dr200_texstate.c979 GLuint *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0]; in import_tex_obj_state()