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Searched refs:UREG_MASK (Results 1 – 2 of 2) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/i915/
Di915_fpc.h146 #define A0_SRC0(reg) (((reg)&UREG_MASK) >> UREG_A0_SRC0_SHIFT_LEFT)
147 #define A1_SRC0(reg) (((reg)&UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT)
148 #define A1_SRC1(reg) (((reg)&UREG_MASK) >> UREG_A1_SRC1_SHIFT_LEFT)
149 #define A2_SRC1(reg) (((reg)&UREG_MASK) << UREG_A2_SRC1_SHIFT_RIGHT)
150 #define A2_SRC2(reg) (((reg)&UREG_MASK) >> UREG_A2_SRC2_SHIFT_LEFT)
171 #define UREG_MASK 0xffffff00 macro
/third_party/mesa3d/src/mesa/drivers/dri/i915/
Di915_program.c45 #define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
46 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT)
47 #define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT)
48 #define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT)
49 #define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT)
68 #define UREG_MASK 0xffffff00 macro