Searched refs:UZP2 (Results 1 – 6 of 6) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 104 UZP2, enumerator
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| D | AArch64SchedKryoDetails.td | 2329 (instregex "((TRN1|TRN2|ZIP1|UZP1|UZP2)v2i64|ZIP2(v2i64|v4i32|v8i16|v16i8))")>;
2359 (instregex "(UZP1|UZP2)(v4i32|v8i16|v16i8)")>;
2365 (instregex "(UZP1|UZP2|ZIP1|ZIP2)(v2i32|v4i16|v8i8)")>;
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| D | AArch64ISelLowering.cpp | 1282 case AArch64ISD::UZP2: return "AArch64ISD::UZP2"; in getTargetNodeName()
3018 return DAG.getNode(AArch64ISD::UZP2, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
7117 return DAG.getNode(AArch64ISD::UZP2, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
7322 unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2; in LowerVECTOR_SHUFFLE()
7335 unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2; in LowerVECTOR_SHUFFLE()
8010 return DAG.getNode(AArch64ISD::UZP2, dl, DAG.getVTList(VT, VT), LHS, in LowerBUILD_VECTOR()
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| D | AArch64SchedFalkorDetails.td | 920 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(TRN1|TRN2|ZIP1|UZP1|UZP2|ZIP2|XTN)(v2i32|v2i64|…
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| D | AArch64InstrInfo.td | 442 def AArch64uzp2 : SDNode<"AArch64ISD::UZP2", SDT_AArch64Zip>;
4691 defm UZP2 : SIMDZipVector<0b101, "uzp2", AArch64uzp2>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 6559 // FastEmit functions for AArch64ISD::UZP2.
9805 …case AArch64ISD::UZP2: return fastEmit_AArch64ISD_UZP2_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKil…
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