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Searched refs:UseMI (Results 1 – 25 of 60) sorted by relevance

123

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp31 MachineInstr *UseMI; member
45 UseMI(MI), OpToFold(nullptr), ShrinkOpcode(ShrinkOp), UseOpNo(OpNo), in FoldCandidate()
95 MachineInstr *UseMI,
135 const MachineInstr &UseMI, in isInlineConstantIfFolded() argument
138 if (TII->isInlineConstant(UseMI, OpNo, OpToFold)) in isInlineConstantIfFolded()
141 unsigned Opc = UseMI.getOpcode(); in isInlineConstantIfFolded()
172 const MachineInstr &UseMI, in frameIndexMayFold() argument
176 (TII->isMUBUF(UseMI) || TII->isFLATScratch(UseMI)) && in frameIndexMayFold()
177 OpNo == AMDGPU::getNamedOperandIdx(UseMI.getOpcode(), AMDGPU::OpName::vaddr); in frameIndexMayFold()
188 MachineInstr *MI = Fold.UseMI; in updateOperand()
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DSIFixSGPRCopies.cpp214 const auto *UseMI = MO.getParent(); in tryChangeVGPRtoSGPRinCopy() local
215 if (UseMI == &MI) in tryChangeVGPRtoSGPRinCopy()
217 if (MO.isDef() || UseMI->getParent() != MI.getParent() || in tryChangeVGPRtoSGPRinCopy()
218 UseMI->getOpcode() <= TargetOpcode::GENERIC_OP_END || in tryChangeVGPRtoSGPRinCopy()
219 !TII->isOperandLegal(*UseMI, UseMI->getOperandNo(&MO), &Src)) in tryChangeVGPRtoSGPRinCopy()
770 const MachineInstr *UseMI = Use.getParent(); in processPHINode() local
771 AllAGPRUses &= (UseMI->isCopy() && in processPHINode()
772 TRI->isAGPR(*MRI, UseMI->getOperand(0).getReg())) || in processPHINode()
774 if (UseMI->isCopy() || UseMI->isRegSequence()) { in processPHINode()
775 if (UseMI->isCopy() && in processPHINode()
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DSIInstrInfo.cpp2315 bool SIInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() argument
2340 unsigned Opc = UseMI.getOpcode(); in FoldImmediate()
2342 bool isVGPRCopy = RI.isVGPR(*MRI, UseMI.getOperand(0).getReg()); in FoldImmediate()
2344 if (RI.isAGPR(*MRI, UseMI.getOperand(0).getReg())) { in FoldImmediate()
2349 UseMI.setDesc(get(NewOpc)); in FoldImmediate()
2350 UseMI.getOperand(1).ChangeToImmediate(ImmOp->getImm()); in FoldImmediate()
2351 UseMI.addImplicitDefUseOperands(*UseMI.getParent()->getParent()); in FoldImmediate()
2361 if (hasAnyModifiersSet(UseMI)) in FoldImmediate()
2367 MachineOperand *Src0 = getNamedOperand(UseMI, AMDGPU::OpName::src0); in FoldImmediate()
2370 if (isInlineConstant(UseMI, *Src0, *ImmOp)) in FoldImmediate()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp92 bool xformUseMI(MachineInstr *TfrMI, MachineInstr *UseMI,
96 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI);
187 MachineInstr &UseMI = *NodeAddr<StmtNode *>(IA).Addr->getCode(); in canRemoveAddasl() local
191 MI.getParent() != UseMI.getParent()) in canRemoveAddasl()
194 const MCInstrDesc &UseMID = UseMI.getDesc(); in canRemoveAddasl()
196 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl()
197 getBaseWithLongOffset(UseMI) < 0) in canRemoveAddasl()
201 if (UseMID.mayStore() && UseMI.getOperand(2).isReg() && in canRemoveAddasl()
202 UseMI.getOperand(2).getReg() == MI.getOperand(0).getReg()) in canRemoveAddasl()
205 for (auto &Mo : UseMI.operands()) in canRemoveAddasl()
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DHexagonConstExtenders.cpp319 MachineInstr *UseMI = nullptr; member
332 return UseMI->getOperand(OpNum); in getOp()
335 return UseMI->getOperand(OpNum); in getOp()
1103 unsigned IdxOpc = getRegOffOpcode(ED.UseMI->getOpcode()); in getOffsetRange()
1113 if (!ED.UseMI->mayLoad() && !ED.UseMI->mayStore()) in getOffsetRange()
1218 ED.UseMI = &MI; in recordExtender()
1285 if (ED.UseMI->getOpcode() == Hexagon::A2_tfrsi) { in assignInits()
1490 MachineBasicBlock *DomB = ED0.UseMI->getParent(); in calculatePlacement()
1491 RefMIs.insert(ED0.UseMI); in calculatePlacement()
1495 MachineBasicBlock *MBB = ED.UseMI->getParent(); in calculatePlacement()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp651 static bool getDataDeps(const MachineInstr &UseMI, in getDataDeps() argument
655 if (UseMI.isDebugInstr()) in getDataDeps()
659 for (MachineInstr::const_mop_iterator I = UseMI.operands_begin(), in getDataDeps()
660 E = UseMI.operands_end(); I != E; ++I) { in getDataDeps()
673 Deps.push_back(DataDep(MRI, Reg, UseMI.getOperandNo(I))); in getDataDeps()
681 static void getPHIDeps(const MachineInstr &UseMI, in getPHIDeps() argument
688 assert(UseMI.isPHI() && UseMI.getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
689 for (unsigned i = 1; i != UseMI.getNumOperands(); i += 2) { in getPHIDeps()
690 if (UseMI.getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
691 Register Reg = UseMI.getOperand(i).getReg(); in getPHIDeps()
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DLiveRangeEdit.cpp187 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
199 if (UseMI && UseMI != MI) in foldAsLoad()
204 UseMI = MI; in foldAsLoad()
207 if (!DefMI || !UseMI) in foldAsLoad()
213 LIS.getInstructionIndex(*UseMI))) in foldAsLoad()
223 << " into single use: " << *UseMI); in foldAsLoad()
226 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second) in foldAsLoad()
229 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS); in foldAsLoad()
233 LIS.ReplaceMachineInstrInMaps(*UseMI, *FoldMI); in foldAsLoad()
234 if (UseMI->isCall()) in foldAsLoad()
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DTargetSchedule.cpp186 const MachineInstr *UseMI, unsigned UseOperIdx) const { in computeOperandLatency() argument
193 if (UseMI) { in computeOperandLatency()
195 *UseMI, UseOperIdx); in computeOperandLatency()
225 if (!UseMI) in computeOperandLatency()
229 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency()
DRegisterScavenging.cpp310 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
367 UseMI = RestorePointMI; in findSurvivorReg()
463 MachineBasicBlock::iterator &UseMI) { in spill() argument
508 if (!TRI->saveScavengerRegister(*MBB, Before, UseMI, &RC, Reg)) { in spill()
525 TII->loadRegFromStackSlot(*MBB, UseMI, Reg, Scavenged[SI].FrameIndex, in spill()
527 II = std::prev(UseMI); in spill()
559 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
560 Register SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
571 ScavengedInfo &Scavenged = spill(SReg, *RC, SPAdj, I, UseMI); in scavengeRegister()
572 Scavenged.Restore = &*std::prev(UseMI); in scavengeRegister()
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DMachineLICM.cpp1005 for (MachineInstr &UseMI : MRI->use_instructions(CopyDstReg)) { in isCopyFeedingInvariantStore()
1006 if (UseMI.mayStore() && isInvariantStore(UseMI, TRI, MRI)) in isCopyFeedingInvariantStore()
1102 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in HasLoopPHIUse()
1104 if (UseMI.isPHI()) { in HasLoopPHIUse()
1107 if (CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1112 if (isExitBlock(UseMI.getParent())) in HasLoopPHIUse()
1117 if (UseMI.isCopy() && CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1118 Work.push_back(&UseMI); in HasLoopPHIUse()
1133 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in HasHighOperandLatency()
1134 if (UseMI.isCopyLike()) in HasHighOperandLatency()
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DDetectDeadLanes.cpp423 const MachineInstr &UseMI = *MO.getParent(); in determineInitialUsedLanes() local
424 if (UseMI.isKill()) in determineInitialUsedLanes()
428 if (lowersToCopies(UseMI)) { in determineInitialUsedLanes()
429 assert(UseMI.getDesc().getNumDefs() == 1); in determineInitialUsedLanes()
430 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes()
437 if (lowersToCopies(UseMI)) { in determineInitialUsedLanes()
439 CrossCopy = isCrossCopy(*MRI, UseMI, DstRC, MO); in determineInitialUsedLanes()
441 LLVM_DEBUG(dbgs() << "Copy across incompatible classes: " << UseMI); in determineInitialUsedLanes()
DOptimizePHIs.cpp157 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DstReg)) { in IsDeadPHICycle()
158 if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle)) in IsDeadPHICycle()
DMachineSSAUpdater.cpp224 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
226 if (UseMI->isPHI()) { in RewriteUse()
227 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
230 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
DRegisterCoalescer.cpp846 MachineInstr *UseMI = MO.getParent(); in removeCopyByCommutingDef() local
847 unsigned OpNo = &MO - &UseMI->getOperand(0); in removeCopyByCommutingDef()
848 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef()
853 if (UseMI->isRegTiedToDefOperand(OpNo)) in removeCopyByCommutingDef()
895 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef() local
896 if (UseMI->isDebugValue()) { in removeCopyByCommutingDef()
902 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef()
913 if (UseMI == CopyMI) in removeCopyByCommutingDef()
915 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
917 if (UseMI->getOperand(0).getReg() != IntB.reg || in removeCopyByCommutingDef()
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DTailDuplicator.cpp219 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate() local
221 if (UseMI->isDebugValue()) { in tailDuplicateAndUpdate()
226 UseMI->eraseFromParent(); in tailDuplicateAndUpdate()
229 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in tailDuplicateAndUpdate()
297 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in isDefLiveOut()
298 if (UseMI.isDebugValue()) in isDefLiveOut()
300 if (UseMI.getParent() != BB) in isDefLiveOut()
DPeepholeOptimizer.cpp501 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() local
502 if (UseMI == &MI) in INITIALIZE_PASS_DEPENDENCY()
505 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
531 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
534 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
537 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
574 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
575 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
586 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
1868 for (const MachineInstr &UseMI : MRI.use_nodbg_instructions(DefOp.getReg())) { in getNextSourceFromBitcast() local
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DModuloSchedule.cpp89 MachineInstr *UseMI = UseOp.getParent(); in expand() local
90 int UseStage = Schedule.getStage(UseMI); in expand()
1148 MachineInstr *UseMI = UseOp.getParent(); in rewriteScheduledInstr() local
1150 if (UseMI->getParent() != BB) in rewriteScheduledInstr()
1152 if (UseMI->isPHI()) { in rewriteScheduledInstr()
1153 if (!Phi->isPHI() && UseMI->getOperand(0).getReg() == NewReg) in rewriteScheduledInstr()
1155 if (getLoopPhiReg(*UseMI, BB) != OldReg) in rewriteScheduledInstr()
1158 InstrMapTy::iterator OrigInstr = InstrMap.find(UseMI); in rewriteScheduledInstr()
1597 for (MachineInstr &UseMI : MRI.use_instructions(DefMO.getReg())) { in filterInstructions()
1600 assert(UseMI.isPHI()); in filterInstructions()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp354 MachineInstr &UseMI = *UseMO.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse() local
356 MachineBasicBlock *InsertBB = UseMI.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse()
359 if (UseMI.isPHI()) { in InsertInsnsWithoutSideEffectsBeforeUse()
431 for (auto &UseMI : MRI.use_instructions(LoadValue.getReg())) { in matchCombineExtendingLoads() local
432 if (UseMI.getOpcode() == TargetOpcode::G_SEXT || in matchCombineExtendingLoads()
433 UseMI.getOpcode() == TargetOpcode::G_ZEXT || in matchCombineExtendingLoads()
434 UseMI.getOpcode() == TargetOpcode::G_ANYEXT) { in matchCombineExtendingLoads()
436 MRI.getType(UseMI.getOperand(0).getReg()), in matchCombineExtendingLoads()
437 UseMI.getOpcode(), &UseMI); in matchCombineExtendingLoads()
493 MachineInstr *UseMI = UseMO->getParent(); in applyCombineExtendingLoads() local
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DLocalizer.cpp151 MachineInstr &UseMI = *MOUse.getParent(); in localizeInterBlock() local
152 if (MRI->hasOneUse(Reg) && !UseMI.isPHI()) in localizeInterBlock()
153 InsertMBB->insert(InsertMBB->SkipPHIsAndLabels(UseMI), LocalizedMI); in localizeInterBlock()
189 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in localizeIntraBlock()
190 if (!UseMI.isPHI()) in localizeIntraBlock()
191 Users.insert(&UseMI); in localizeIntraBlock()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp122 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg() local
123 if (UseMI->getParent() != MBB) in getDefReg()
126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
127 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
130 UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg()
131 if (UseMI->getParent() != MBB) in getDefReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp676 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
689 LLVM_DEBUG(UseMI.dump()); in recordUnoptimizableWebs()
719 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
720 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
761 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
762 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval()
766 LLVM_DEBUG(UseMI.dump()); in markSwapsForRemoval()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16RegisterInfo.cpp59 MachineBasicBlock::iterator &UseMI, in saveScavengerRegister() argument
65 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); in saveScavengerRegister()
DMips16RegisterInfo.h33 MachineBasicBlock::iterator &UseMI,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DCombinerHelper.h80 bool isPredecessor(MachineInstr &DefMI, MachineInstr &UseMI);
88 bool dominates(MachineInstr &DefMI, MachineInstr &UseMI);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DRegisterScavenging.h218 MachineBasicBlock::iterator &UseMI);
230 MachineBasicBlock::iterator &UseMI);

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