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Searched refs:V3D_CHANNELS (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/broadcom/compiler/
Dv3d_nir_lower_scratch.c50 return nir_imul_imm(b, offset, V3D_CHANNELS); in v3d_nir_scratch_offset()
63 nir_iadd_imm(b, offset, V3D_CHANNELS * i * 4); in v3d_nir_lower_load_scratch()
99 nir_iadd_imm(b, offset, V3D_CHANNELS * i * 4); in v3d_nir_lower_store_scratch()
Dvir_register_allocate.c257 c->spill_size += V3D_CHANNELS * sizeof(uint32_t); in v3d_spill_reg()
797 V3D_CHANNELS * sizeof(uint32_t) * force_register_spills) { in v3d_register_allocate()
Dvir.c729 int sector_size = V3D_CHANNELS * sizeof(uint32_t) * 8; in v3d_vs_set_prog_data()
1378 c->s->info.workgroup_size[2], V3D_CHANNELS); in lower_load_num_subgroups()
1996 const uint32_t sector_size = V3D_CHANNELS * sizeof(uint32_t) * 8; in compute_vpm_size_in_sectors()
Dnir_to_vir.c3104 STATIC_ASSERT(util_is_power_of_two_nonzero(V3D_CHANNELS)); in ntq_emit_intrinsic()
3105 const uint32_t divide_shift = ffs(V3D_CHANNELS) - 1; in ntq_emit_intrinsic()
3278 vir_uniform_ui(c, V3D_CHANNELS)); in ntq_emit_intrinsic()
3869 c->spill_size += V3D_CHANNELS * c->s->scratch_size; in nir_to_vir()
/third_party/mesa3d/src/broadcom/common/
Dv3d_limits.h30 #define V3D_CHANNELS 16 macro
/third_party/mesa3d/src/broadcom/vulkan/
Dv3dv_device.c1536 props->subgroupSize = V3D_CHANNELS; in v3dv_GetPhysicalDeviceProperties2()