Searched refs:VOP3P (Results 1 – 18 of 18) sorted by relevance
| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_opcodes.py | 71 VOP3P = 19 variable in Format
155 elif self == Format.VOP3P:
966 opcode(name, -1, code, code, Format.VOP3P, InstrClass.Valu32, modifiers, modifiers)
967 opcode("v_dot2_i32_i16", -1, 0x26, 0x14, Format.VOP3P, InstrClass.Valu32)
968 opcode("v_dot2_u32_u16", -1, 0x27, 0x15, Format.VOP3P, InstrClass.Valu32)
969 opcode("v_dot4_i32_i8", -1, 0x28, 0x16, Format.VOP3P, InstrClass.Valu32)
970 opcode("v_dot4_u32_u8", -1, 0x29, 0x17, Format.VOP3P, InstrClass.Valu32)
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| D | aco_opt_value_numbering.cpp | 219 case Format::VOP3P: { in operator ()()
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| D | aco_ir.h | 98 VOP3P = 19, enumerator
1229 constexpr bool isVOP3P() const noexcept { return format == Format::VOP3P; } in isVOP3P()
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| D | aco_print_ir.cpp | 549 case Format::VOP3P: { in print_instr_format_specific()
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| D | aco_optimizer.cpp | 2750 !instr->isSDWA() && instr->format != Format::VOP3P) in apply_sgprs()
3209 create_instruction<VOP3P_instruction>(mad, Format::VOP3P, 3, 1)}; in combine_vop3p()
3961 if (instr->isVALU() && i > 0 && instr->format != Format::VOP3P) in apply_literals()
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| D | aco_register_allocation.cpp | 488 if (instr->format == Format::VOP3P) in get_subdword_operand_stride()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 32 field bit VOP3P = 0;
107 // This bit indicates that this is a packed VOP3P instruction
144 let TSFlags{12} = VOP3P;
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| D | VOP3PInstructions.td | 10 // VOP3P Classes
18 // Non-packed instructions that use the VOP3P encoding.
19 // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed.
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| D | SIDefines.h | 38 VOP3P = 1 << 12, enumerator
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| D | SIInstrInfo.h | 567 return MI.getDesc().TSFlags & SIInstrFlags::VOP3P; in isVOP3P()
571 return get(Opcode).TSFlags & SIInstrFlags::VOP3P; in isVOP3P()
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| D | VOPInstructions.td | 134 let VOP3P = 1;
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| D | AMDGPU.td | 284 "Has VOP3P packed instructions"
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| D | SIInstructions.td | 1147 // VOP3P instructions, so it is turned into the bit op.
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| D | SIInstrInfo.td | 1910 // Returns the assembly string for the inputs and outputs of a VOP3P
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.3.3.rst | 54 - aco/optimizer: fix fneg modifier propagation on VOP3P
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| D | 21.0.0.rst | 835 - aco: fix VOP3P assembly, VN and validation
836 - aco/RA: fix subdword operands on VOP3P instructions
837 - aco: allow constants/literals on every src position for VOP3P
838 - aco: allow SGPRs on every src position for VOP3P
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| D | 21.1.0.rst | 1343 - aco: fix VOP3P assembly, VN and validation
1344 - aco/RA: fix subdword operands on VOP3P instructions
1345 - aco: allow constants/literals on every src position for VOP3P
1346 - aco: allow SGPRs on every src position for VOP3P
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2821 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | in validateConstantBusLimitations()
3260 if ((Desc.TSFlags & (VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA)) == 0) in validateLdsDirect()
3398 if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P))) in validateVOP3Literal()
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