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Searched refs:_TNL_NUM_TEX (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/mesa/drivers/dri/r200/
Dr200_swtcl.c103 (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) ) { in r200SetVertexFormat()
163 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in r200SetVertexFormat()
258 if ((0 == (tnl->render_inputs_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX))) in r200ChooseVertexState()
264 if (tnl->render_inputs_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in r200ChooseVertexState()
/third_party/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_swtcl.c113 (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX))) { in radeonSetVertexFormat()
176 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in radeonSetVertexFormat()
296 (BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX) in radeonChooseVertexState()
/third_party/mesa3d/src/mesa/tnl/
Dt_context.h167 #define _TNL_NUM_TEX 8 macro
/third_party/mesa3d/src/mesa/swrast_setup/
Dss_context.c147 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) in setup_vertex_format()
/third_party/mesa3d/src/mesa/drivers/dri/i915/
Di830_vtbl.c96 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in i830_render_start()
127 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in i830_render_start()