| /third_party/ltp/tools/sparse/sparse-src/ |
| D | dominate.c | 28 struct piggy *bank; in bank_init() local
29 bank = calloc(1, sizeof(*bank) + levels * sizeof(bank->lists[0])); in bank_init()
30 bank->max = levels - 1; in bank_init()
31 return bank; in bank_init()
34 static void bank_free(struct piggy *bank, unsigned int levels) in bank_free() argument
37 free_ptr_list(&bank->lists[levels]); in bank_free()
38 free(bank); in bank_free()
41 static void bank_put(struct piggy *bank, struct basic_block *bb) in bank_put() argument
44 assert(level <= bank->max); in bank_put()
45 add_bb(&bank->lists[level], bb); in bank_put()
[all …]
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| /third_party/mesa3d/src/amd/addrlib/src/r800/ |
| D | egbaddrlib.cpp | 1611 UINT_32 bank; in ComputeSurfaceAddrFromCoordMacroTiled() local
1806 bank = ComputeBankFromCoord(x, in ComputeSurfaceAddrFromCoordMacroTiled()
1832 UINT_32 bankBits = bank << (numPipeInterleaveBits + numPipeBits + in ComputeSurfaceAddrFromCoordMacroTiled()
2349 UINT_32 bank; in ComputeSurfaceCoordFromAddrMacroTiled() local
2446 bank = ComputeBankFromAddr(addr, banks, pipes); in ComputeSurfaceCoordFromAddrMacroTiled()
2453 bank, in ComputeSurfaceCoordFromAddrMacroTiled()
2477 UINT_32 bank, ///< [in] bank number in ComputeSurfaceCoord2DFromBankPipe() argument
2526 bank ^= tileSplitRotation * tileSlices; in ComputeSurfaceCoord2DFromBankPipe()
2529 bank ^= bankRotation * (slice / microTileThickness) + bankSwizzle; in ComputeSurfaceCoord2DFromBankPipe()
2530 bank %= pTileInfo->banks; in ComputeSurfaceCoord2DFromBankPipe()
[all …]
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| D | egbaddrlib.h | 195 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0;
199 UINT_32 bank, UINT_32 pipe,
285 UINT_32 bank, UINT_32 pipe,
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| D | siaddrlib.h | 231 UINT_32 bank, UINT_32 pipe,
237 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const;
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| /third_party/node/deps/brotli/c/enc/ |
| D | hash_forgetful_chain_inc.h | 138 const size_t bank = key & (NUM_BANKS - 1); in FN() local
139 const size_t idx = self->free_slot_idx[bank]++ & (BANK_SIZE - 1); in FN()
143 banks[bank].slots[idx].delta = (uint16_t)delta; in FN()
144 banks[bank].slots[idx].next = head[key]; in FN()
243 const size_t bank = key & (NUM_BANKS - 1); in FN() local
254 slot = banks[bank].slots[last].next; in FN()
255 delta = banks[bank].slots[last].delta; in FN()
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| /third_party/skia/third_party/externals/brotli/c/enc/ |
| D | hash_forgetful_chain_inc.h | 138 const size_t bank = key & (NUM_BANKS - 1); in FN() local
139 const size_t idx = self->free_slot_idx[bank]++ & (BANK_SIZE - 1); in FN()
143 banks[bank].slots[idx].delta = (uint16_t)delta; in FN()
144 banks[bank].slots[idx].next = head[key]; in FN()
243 const size_t bank = key & (NUM_BANKS - 1); in FN() local
254 slot = banks[bank].slots[last].next; in FN()
255 delta = banks[bank].slots[last].delta; in FN()
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| /third_party/alsa-lib/src/seq/ |
| D | seq_old.c | 154 int bank ATTRIBUTE_UNUSED, in snd_instr_iwffff_open_rom()
162 int bank ATTRIBUTE_UNUSED, in snd_instr_iwffff_open_rom_file()
179 int bank ATTRIBUTE_UNUSED, in snd_instr_iwffff_load()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUGenRegisterBankInfo.def | 172 default: llvm_unreachable("Invalid register bank");
186 default: llvm_unreachable("Invalid register bank");
232 /* FIXME: The generic register bank select does not support complex
235 * FIXME: register bank select now tries to handle complex break downs,
262 // the register bank is SGPR or if we don't know how to handle the vector
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| /third_party/mesa3d/src/freedreno/.gitlab-ci/reference/ |
| D | crash.log | 3392 - bank: 0
3394 - bank: 1
3396 - bank: 2
3399 - bank: 0
3401 - bank: 1
3403 - bank: 2
3406 - bank: 0
3408 - bank: 1
3410 - bank: 2
3413 - bank: 0
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| /third_party/mesa3d/src/gallium/drivers/r300/ |
| D | r300_fs.c | 306 unsigned int bank = 0; in r300_emit_fs_code_to_buffer() local
343 unsigned int bank_alu_offset = bank * 64; in r300_emit_fs_code_to_buffer()
345 unsigned int bank_tex_offset = bank * 32; in r300_emit_fs_code_to_buffer()
349 (bank << R400_BANK_SHIFT) | R400_R390_MODE_ENABLE : 0);//2 in r300_emit_fs_code_to_buffer()
383 bank++; in r300_emit_fs_code_to_buffer()
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | eg_asm.c | 50 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) | in eg_bytecode_cf_build()
51 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) | in eg_bytecode_cf_build()
63 S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) | in eg_bytecode_cf_build()
64 S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank); in eg_bytecode_cf_build()
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| D | r600_asm.c | 962 unsigned bank, unsigned line, unsigned index_mode) in r600_bytecode_alloc_kcache_line() argument
970 if (kcache[i].bank < bank) in r600_bytecode_alloc_kcache_line()
973 if ((kcache[i].bank == bank && kcache[i].addr > line+1) || in r600_bytecode_alloc_kcache_line()
974 kcache[i].bank > bank) { in r600_bytecode_alloc_kcache_line()
983 kcache[i].bank = bank; in r600_bytecode_alloc_kcache_line()
1013 kcache[i].bank = bank; in r600_bytecode_alloc_kcache_line()
1029 unsigned bank, line, sel = alu->src[i].sel, index_mode; in r600_bytecode_alloc_inst_kcache_lines() local
1034 bank = alu->src[i].kc_bank; in r600_bytecode_alloc_inst_kcache_lines()
1035 assert(bank < R600_MAX_HW_CONST_BUFFERS); in r600_bytecode_alloc_inst_kcache_lines()
1039 if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line, index_mode))) in r600_bytecode_alloc_inst_kcache_lines()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/GlobalISel/ |
| D | RegisterBank.td | 1 //===- RegisterBank.td - Register bank definitions ---------*- tablegen -*-===//
|
| /third_party/alsa-lib/include/sound/uapi/ |
| D | asound_fm.h | 128 unsigned char bank; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64GenRegisterBankInfo.def | 73 // Cross register bank copies.
217 assert(DstBankID < AArch64::NumRegisterBanks && "Invalid bank ID");
218 assert(SrcBankID < AArch64::NumRegisterBanks && "Invalid bank ID");
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| D | CMakeLists.txt | 16 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | CMakeLists.txt | 12 tablegen(LLVM RISCVGenRegisterBank.inc -gen-register-bank)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | CMakeLists.txt | 13 tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | CMakeLists.txt | 13 tablegen(LLVM MipsGenRegisterBank.inc -gen-register-bank)
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| /third_party/ltp/testcases/kernel/mce-test/tsrc/erst-inj/ |
| D | cper.h | 197 __u16 bank; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | CMakeLists.txt | 14 tablegen(LLVM X86GenRegisterBank.inc -gen-register-bank)
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| /third_party/mesa3d/src/freedreno/afuc/ |
| D | README.rst | 17 them; any global state like which bank of context registers is to
214 arranged so bit 11 is zero for bank 0 and 1 for bank 1. The ME fw (at
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| /third_party/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_bc_builder.cpp | 214 .KCACHE_BANK2(bc.kc[2].bank) in build_cf_alu()
215 .KCACHE_BANK3(bc.kc[3].bank) in build_cf_alu()
232 .KCACHE_BANK0(bc.kc[0].bank) in build_cf_alu()
233 .KCACHE_BANK1(bc.kc[1].bank) in build_cf_alu()
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| D | sb_bc_decoder.cpp | 118 bc.kc[0].bank = w0.get_KCACHE_BANK0(); in decode_cf_alu()
119 bc.kc[1].bank = w0.get_KCACHE_BANK1(); in decode_cf_alu()
151 bc.kc[2].bank = w0.get_KCACHE_BANK2(); in decode_cf_alu()
152 bc.kc[3].bank = w0.get_KCACHE_BANK3(); in decode_cf_alu()
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| /third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/metal/shaders/ |
| D | gen_mipmap.metal | 56 // Use struct of array style to avoid bank conflict.
236 // Use struct of array style to avoid bank conflict.
502 // Use struct of array style to avoid bank conflict.
550 // Use struct of array style to avoid bank conflict.
|