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Searched refs:buildInsert (Results 1 – 7 of 7) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/
DOperations.cpp267 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertValueDescriptor() local
275 buildInsert}; in insertValueDescriptor()
287 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertElementDescriptor() local
293 buildInsert}; in insertElementDescriptor()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCallLowering.cpp148 MIRBuilder.buildInsert(NewDst, Dst, SrcRegs[i], Offsets[i]); in packRegs()
DMachineIRBuilder.cpp563 buildInsert(ResOut, ResIn, Ops[i], Indices[i]); in buildSequence()
645 MachineInstrBuilder MachineIRBuilder::buildInsert(Register Res, Register Src, in buildInsert() function in MachineIRBuilder
DLegalizerHelper.cpp224 MIRBuilder.buildInsert(NewResultReg, CurResultReg, PartReg, Offset); in insertParts()
234 MIRBuilder.buildInsert(NewResultReg, CurResultReg, LeftoverRegs[I], Offset); in insertParts()
1171 MIRBuilder.buildInsert(MoreReg, ImpDef, MO.getReg(), 0); in moreElementsVectorSrc()
2391 MIRBuilder.buildInsert(PartInsertReg, AccumDstReg, PartDstReg, Offset); in fewerElementsVectorBasic()
2406 MIRBuilder.buildInsert(DstReg, AccumDstReg, PartDstReg, BitsForNumParts); in fewerElementsVectorBasic()
3622 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalarInsert()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUCallLowering.cpp252 B.buildInsert(BigReg, ImpDef.getReg(0), SrcReg, 0).getReg(0); in unpackRegsToOrigType()
DAMDGPULegalizerInfo.cpp1581 B.buildInsert(Dst, Vec, Ins, IdxVal.getValue() * EltTy.getSizeInBits()); in legalizeInsertVectorElt()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DMachineIRBuilder.h850 MachineInstrBuilder buildInsert(Register Res, Register Src,