Searched refs:cb_dcc_base (Results 1 – 4 of 4) sorted by relevance
3051 uint64_t cb_color_base, cb_color_fmask, cb_color_cmask, cb_dcc_base; in si_emit_framebuffer_state() local3079 cb_dcc_base = 0; in si_emit_framebuffer_state()3114 cb_dcc_base = (tex->buffer.gpu_address + tex->surface.meta_offset) >> 8; in si_emit_framebuffer_state()3118 cb_dcc_base |= dcc_tile_swizzle; in si_emit_framebuffer_state()3152 radeon_emit(cb_dcc_base); /* CB_COLOR0_DCC_BASE */ in si_emit_framebuffer_state()3159 radeon_set_context_reg(R_028EA0_CB_COLOR0_DCC_BASE_EXT + i * 4, cb_dcc_base >> 32); in si_emit_framebuffer_state()3197 radeon_emit(cb_dcc_base); /* CB_COLOR0_DCC_BASE */ in si_emit_framebuffer_state()3198 radeon_emit(S_028C98_BASE_256B(cb_dcc_base >> 32)); /* CB_COLOR0_DCC_BASE_EXT */ in si_emit_framebuffer_state()3218 if (cb_dcc_base) in si_emit_framebuffer_state()3219 … cb_dcc_base += tex->surface.u.legacy.color.dcc_level[cb->base.u.tex.level].dcc_offset >> 8; in si_emit_framebuffer_state()[all …]
1766 …adeon_set_context_reg(cmd_buffer->cs, R_028C94_CB_COLOR0_DCC_BASE + index * 0x3c, cb->cb_dcc_base); in radv_emit_fb_color_state()1775 cb->cb_dcc_base >> 32); in radv_emit_fb_color_state()1795 radeon_emit(cmd_buffer->cs, cb->cb_dcc_base); in radv_emit_fb_color_state()1796 radeon_emit(cmd_buffer->cs, S_028C98_BASE_256B(cb->cb_dcc_base >> 32)); in radv_emit_fb_color_state()1816 cb->cb_dcc_base); in radv_emit_fb_color_state()
1246 uint64_t cb_dcc_base; member
6681 cb->cb_dcc_base = va >> 8; in radv_initialise_color_surface()6682 cb->cb_dcc_base |= dcc_tile_swizzle; in radv_initialise_color_surface()