| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi.c | 240 unsigned chan_index; in lp_build_tgsi_inst_llvm() local
269 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) { in lp_build_tgsi_inst_llvm()
270 emit_data.output[chan_index] = bld_base->base.undef; in lp_build_tgsi_inst_llvm()
274 TGSI_FOR_EACH_DST1_ENABLED_CHANNEL( inst, chan_index ) { in lp_build_tgsi_inst_llvm()
275 emit_data.output1[chan_index] = bld_base->base.undef; in lp_build_tgsi_inst_llvm()
285 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { in lp_build_tgsi_inst_llvm()
286 int src_index = get_src_chan_idx(inst->Instruction.Opcode, chan_index); in lp_build_tgsi_inst_llvm()
290 emit_data.chan = chan_index; in lp_build_tgsi_inst_llvm()
315 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { in lp_build_tgsi_inst_llvm()
316 emit_data.output[chan_index] = val; in lp_build_tgsi_inst_llvm()
[all …]
|
| D | lp_bld_tgsi_soa.c | 771 unsigned chan_index, in get_soa_array_offsets() argument
776 lp_build_const_int_vec(uint_bld->gallivm, uint_bld->type, chan_index); in get_soa_array_offsets()
1675 unsigned chan_index, in emit_store_output() argument
1694 chan_index, in emit_store_output()
1707 chan_index); in emit_store_output()
1711 chan_index + 1); in emit_store_output()
1724 unsigned chan_index, in emit_store_tcs_output() argument
1763 channel_index = lp_build_const_int32(gallivm, chan_index); in emit_store_tcs_output()
1783 unsigned chan_index, in emit_store_temp() argument
1805 chan_index, in emit_store_temp()
[all …]
|
| D | lp_bld_tgsi.h | 741 const unsigned chan_index);
748 const unsigned chan_index);
756 const unsigned chan_index);
|
| D | lp_bld_nir_soa.c | 156 unsigned chan_index, in get_soa_array_offsets() argument
161 lp_build_const_int_vec(uint_bld->gallivm, uint_bld->type, chan_index); in get_soa_array_offsets()
|
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_vec4_builder.h | 351 const dst_reg chan_index = in emit_uniformize() local
355 ubld.emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, chan_index); in emit_uniformize()
356 ubld.emit(SHADER_OPCODE_BROADCAST, dst, src, src_reg(chan_index)); in emit_uniformize()
|
| D | brw_fs_builder.h | 415 const dst_reg chan_index = vgrf(BRW_REGISTER_TYPE_UD); in emit_uniformize() local
418 ubld.emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, chan_index); in emit_uniformize()
419 ubld.emit(SHADER_OPCODE_BROADCAST, dst, src, component(chan_index, 0)); in emit_uniformize()
|
| D | brw_vec4_visitor.cpp | 778 const src_reg chan_index(this, glsl_type::uint_type); in emit_uniformize() local
782 emit(SHADER_OPCODE_FIND_LIVE_CHANNEL, dst_reg(chan_index)) in emit_uniformize()
784 emit(SHADER_OPCODE_BROADCAST, dst, src, chan_index) in emit_uniformize()
|
| D | brw_fs_nir.cpp | 4165 const fs_reg &chan_index = in swizzle_nir_scratch_addr() local
4175 bld.OR(addr, addr, chan_index); in swizzle_nir_scratch_addr()
4184 bld.SHL(chan_addr, chan_index, brw_imm_ud(2)); in swizzle_nir_scratch_addr()
|
| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_exec.c | 1656 const uint chan_index) in fetch_source_d() argument
1665 swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index ); in fetch_source_d()
1678 const uint chan_index, in fetch_source() argument
1681 fetch_source_d(mach, chan, reg, chan_index); in fetch_source()
1701 uint chan_index) in store_dest_dstret() argument
1752 dst = &mach->Outputs[offset + index].xyzw[chan_index]; in store_dest_dstret()
1770 dst = &mach->Temps[offset + index].xyzw[chan_index]; in store_dest_dstret()
1776 dst = &mach->Addrs[index].xyzw[chan_index]; in store_dest_dstret()
1790 uint chan_index) in store_dest_double() argument
1796 dst = store_dest_dstret(mach, chan, reg, chan_index); in store_dest_double()
[all …]
|
| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_nir_to_llvm.c | 751 LLVMValueRef chan_index = buffer_index; in load_vs_input() local
757 chan_index = LLVMBuildAdd(ctx->ac.builder, buffer_index, buffer_offset, ""); in load_vs_input()
763 &ctx->ac, t_list, chan_index, LLVMConstInt(ctx->ac.i32, chan_offset, false), in load_vs_input()
|