| /third_party/mesa3d/src/compiler/glsl/ |
| D | lower_ubo_reference.cpp | 66 unsigned *const_offset,
278 unsigned *const_offset, in setup_for_load_or_store() argument
317 *const_offset = 0; in setup_for_load_or_store()
319 *const_offset = blocks[i]->Uniforms[var->data.location].Offset; in setup_for_load_or_store()
329 setup_buffer_access(mem_ctx, deref, offset, const_offset, row_major, in setup_for_load_or_store()
350 unsigned const_offset; in handle_rvalue() local
367 &offset, &const_offset, in handle_rvalue()
388 emit_access(mem_ctx, false, deref, load_offset, const_offset, in handle_rvalue()
566 unsigned const_offset; in write_to_memory() local
581 &offset, &const_offset, in write_to_memory()
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| D | lower_shared_reference.cpp | 141 unsigned const_offset = get_shared_offset(var); in handle_rvalue() local
148 &offset, &const_offset, in handle_rvalue()
168 emit_access(mem_ctx, false, deref, load_offset, const_offset, row_major, in handle_rvalue()
209 unsigned const_offset = get_shared_offset(var); in handle_assignment() local
216 &offset, &const_offset, in handle_assignment()
228 emit_access(mem_ctx, true, deref, store_offset, const_offset, row_major, in handle_assignment()
369 unsigned const_offset = get_shared_offset(var); in lower_shared_atomic_intrinsic() local
377 &offset, &const_offset, in lower_shared_atomic_intrinsic()
385 add(offset, new(mem_ctx) ir_constant(const_offset)); in lower_shared_atomic_intrinsic()
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| D | lower_buffer_access.cpp | 276 unsigned *const_offset, in setup_buffer_access() argument
359 *const_offset += array_stride * const_index->value.u[0]; in setup_buffer_access()
424 *const_offset += intra_struct_offset; in setup_buffer_access()
434 *const_offset += deref_swizzle->mask.x * sizeof(int); in setup_buffer_access()
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| D | lower_buffer_access.h | 58 ir_rvalue **offset, unsigned *const_offset,
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_analyze_ubo_ranges.c | 297 int const_offset = 0; in lower_ubo_load_to_uniform() local
299 handle_partial_const(b, &ubo_offset, &const_offset); in lower_ubo_load_to_uniform()
317 debug_assert(!(const_offset & 0x3)); in lower_ubo_load_to_uniform()
318 const_offset >>= 2; in lower_ubo_load_to_uniform()
321 const_offset += range_offset; in lower_ubo_load_to_uniform()
329 if (const_offset < 0) { in lower_ubo_load_to_uniform()
330 uniform_offset = nir_iadd_imm(b, uniform_offset, const_offset); in lower_ubo_load_to_uniform()
331 const_offset = 0; in lower_ubo_load_to_uniform()
336 uniform_offset, .base = const_offset); in lower_ubo_load_to_uniform()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_emitssboinstruction.cpp | 634 auto const_offset = nir_src_as_const_value(intrin->src[0]); in emit_image_size() local
637 if (const_offset) in emit_image_size()
638 res_id += const_offset[0].u32; in emit_image_size()
657 if (const_offset) { in emit_image_size()
658 unsigned lookup_resid = const_offset[0].u32; in emit_image_size()
705 auto const_offset = nir_src_as_const_value(intr->src[0]); in emit_buffer_size() local
708 if (const_offset) in emit_buffer_size()
709 res_id += const_offset[0].u32; in emit_buffer_size()
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| /third_party/mesa3d/src/mesa/drivers/dri/i965/ |
| D | gfx6_constant_state.c | 257 uint32_t const_offset; in brw_upload_pull_constants() local
259 &const_bo, &const_offset); in brw_upload_pull_constants()
276 const_bo, const_offset, in brw_upload_pull_constants()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 344 uint32_t *const_offset, in emit_tmu_general_store_writes() argument
374 *const_offset = base_const_offset + first_component * 4; in emit_tmu_general_store_writes()
435 uint32_t const_offset, in emit_tmu_general_address_write() argument
459 if (const_offset != 0) { in emit_tmu_general_address_write()
461 vir_uniform_ui(c, const_offset)); in emit_tmu_general_address_write()
466 if (const_offset != 0) { in emit_tmu_general_address_write()
468 vir_uniform_ui(c, const_offset)); in emit_tmu_general_address_write()
534 uint32_t const_offset = 0; in ntq_emit_tmu_general() local
536 const_offset = nir_src_as_uint(instr->src[offset_src]); in ntq_emit_tmu_general()
540 const_offset += nir_intrinsic_base(instr); in ntq_emit_tmu_general()
[all …]
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| /third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
| D | spirv_builder.c | 756 SpvId const_offset, in spirv_builder_emit_image_sample() argument
787 assert(!(const_offset && offset)); in spirv_builder_emit_image_sample()
788 if (const_offset) { in spirv_builder_emit_image_sample()
789 extra_operands[num_extra_operands++] = const_offset; in spirv_builder_emit_image_sample()
924 SpvId const_offset, in spirv_builder_emit_image_gather() argument
942 assert(!(const_offset && offset)); in spirv_builder_emit_image_gather()
943 if (const_offset) { in spirv_builder_emit_image_gather()
944 extra_operands[num_extra_operands++] = const_offset; in spirv_builder_emit_image_gather()
978 SpvId const_offset, in spirv_builder_emit_image_fetch() argument
994 assert(!(const_offset && offset)); in spirv_builder_emit_image_fetch()
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| D | spirv_builder.h | 285 SpvId const_offset,
324 SpvId const_offset,
334 SpvId const_offset,
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| D | nir_to_spirv.c | 3110 const_offset = 0, offset = 0, sample = 0, tex_offset = 0, bindless = 0; in emit_tex() local
3145 const_offset = spirv_builder_const_composite(&ctx->builder, in emit_tex()
3150 const_offset = components[0]; in emit_tex()
3344 if (const_offset) in emit_tex()
3348 lod, sample, const_offset, offset, dref); in emit_tex()
3351 image, coord, lod, sample, const_offset, offset); in emit_tex()
3358 const_offset, offset); in emit_tex()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_nir_lower_mem_access_bit_sizes.c | 184 const unsigned const_offset = in lower_mem_store_bit_size() local
211 (offset_is_const && (start + const_offset) % 4 == 0); in lower_mem_store_bit_size()
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| D | brw_fs.h | 119 uint32_t const_offset,
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| D | brw_fs_nir.cpp | 3726 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in nir_emit_fs_intrinsic() local
3728 if (const_offset) { in nir_emit_fs_intrinsic()
3730 unsigned off_x = const_offset[0].u32 & 0xf; in nir_emit_fs_intrinsic()
3731 unsigned off_y = const_offset[1].u32 & 0xf; in nir_emit_fs_intrinsic()
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| D | brw_fs.cpp | 169 uint32_t const_offset, in VARYING_PULL_CONSTANT_LOAD() argument
184 bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf)); in VARYING_PULL_CONSTANT_LOAD()
199 (const_offset & 0xf) / type_sz(dst.type), 1); in VARYING_PULL_CONSTANT_LOAD()
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| /third_party/mesa3d/src/asahi/compiler/ |
| D | agx_compile.c | 332 int32_t const_offset = offset_is_const ? nir_src_as_int(*offset) : 0; in agx_emit_load_ubo() local
336 assert((const_offset & (bytes - 1)) == 0); in agx_emit_load_ubo()
337 const_offset = const_offset / bytes; in agx_emit_load_ubo()
338 int16_t const_as_16 = const_offset; in agx_emit_load_ubo()
358 (offset_is_const && (const_offset == const_as_16)) ? in agx_emit_load_ubo()
359 agx_immediate(const_as_16) : agx_mov_imm(b, 32, const_offset), in agx_emit_load_ubo()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2_nir.c | 596 ASSERTED nir_const_value *const_offset; in emit_intrinsic() local
608 const_offset = nir_src_as_const_value(intr->src[0]); in emit_intrinsic()
609 assert(const_offset); /* TODO can be false in ES2? */ in emit_intrinsic()
611 idx += (uint32_t)const_offset[0].f32; in emit_intrinsic()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 3343 nir_const_value* const_offset = nir_src_as_const_value(instr->src[1].src); in visit_alu_instr() local
3345 if (const_offset && const_bits) { in visit_alu_instr()
3346 uint32_t extract = (const_bits->u32 << 16) | (const_offset->u32 & 0x1f); in visit_alu_instr()
3364 Operand offset_op = const_offset in visit_alu_instr()
3365 ? Operand::c32(const_offset->u32 & 0x1fu) in visit_alu_instr()
3641 unsigned const_offset = 0; member
3654 unsigned bytes_needed, unsigned align, unsigned const_offset,
3673 unsigned const_offset = info.const_offset; in emit_load() local
3676 unsigned align_offset = (info.align_offset + const_offset) % align_mul; in emit_load()
3713 unsigned reduced_const_offset = const_offset; in emit_load()
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| D | aco_statistics.cpp | 237 bool const_offset = in get_wait_counter_info() local
240 if (likely_desc_load || const_offset) in get_wait_counter_info()
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| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_nir.c | 1159 uint32_t const_offset = 0; in get_deref_offset() local
1164 const_offset = nir_src_as_uint(instr->arr.index); in get_deref_offset()
1175 const_offset += glsl_count_attribute_slots(ft, vs_in); in get_deref_offset()
1180 const_offset += nir_src_comp_as_int(path.path[idx_lvl]->arr.index, 0) * size; in get_deref_offset()
1198 if (const_offset && offset) in get_deref_offset()
1200 … lp_build_const_int_vec(bld_base->base.gallivm, bld_base->uint_bld.type, const_offset), in get_deref_offset()
1202 *const_out = const_offset; in get_deref_offset()
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| /third_party/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi.cpp | 2104 unsigned const_offset = const_offset_ir ? in visit_expression() local
2124 cbuf.index = const_offset / 16; in visit_expression()
2147 const_offset = const_offset_ir->value.u[0]; in visit_expression()
2148 cbuf.index = const_offset / 16; in visit_expression()
2173 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 8, in visit_expression()
2174 const_offset % 16 / 8, in visit_expression()
2175 const_offset % 16 / 8, in visit_expression()
2176 const_offset % 16 / 8); in visit_expression()
2178 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4, in visit_expression()
2179 const_offset % 16 / 4, in visit_expression()
[all …]
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_descriptors.c | 1157 const uint8_t *ptr, unsigned size, uint32_t *const_offset) in si_upload_const_buffer() argument
1162 const_offset, (struct pipe_resource **)buf, &tmp); in si_upload_const_buffer()
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| /third_party/mesa3d/src/microsoft/compiler/ |
| D | nir_to_dxil.c | 2650 nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]); in emit_load_ubo() local
2651 if (const_offset) { in emit_load_ubo()
2652 offset = dxil_module_get_int32_const(&ctx->mod, const_offset->i32 >> 4); in emit_load_ubo()
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| /third_party/mesa3d/src/amd/llvm/ |
| D | ac_nir_to_llvm.c | 4167 unsigned const_offset = nir_intrinsic_base(instr); in visit_intrinsic() local
4195 addr_voffset, addr_soffset, const_offset, in visit_intrinsic()
4206 unsigned const_offset = nir_intrinsic_base(instr); in visit_intrinsic() local
4217 addr_voffset, addr_soffset, const_offset, in visit_intrinsic()
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| D | bifrost_compile.c | 731 uint32_t const_offset = offset_is_const ? nir_src_as_uint(*offset) : 0; in bi_emit_load_ubo() local
736 bi_imm_u32(const_offset) : dyn_offset, in bi_emit_load_ubo()
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