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Searched refs:const_state (Results 1 – 20 of 20) sorted by relevance

/third_party/mesa3d/src/freedreno/ir3/
Dir3_disk_cache.c132 blob_copy_bytes(blob, v->const_state, sizeof(*v->const_state)); in retrieve_variant()
133 unsigned immeds_sz = v->const_state->immediates_size * in retrieve_variant()
134 sizeof(v->const_state->immediates[0]); in retrieve_variant()
135 v->const_state->immediates = ralloc_size(v->const_state, immeds_sz); in retrieve_variant()
136 blob_copy_bytes(blob, v->const_state->immediates, immeds_sz); in retrieve_variant()
154 blob_write_bytes(blob, v->const_state, sizeof(*v->const_state)); in store_variant()
155 unsigned immeds_sz = v->const_state->immediates_size * in store_variant()
156 sizeof(v->const_state->immediates[0]); in store_variant()
157 blob_write_bytes(blob, v->const_state->immediates, immeds_sz); in store_variant()
Dir3_nir.c853 struct ir3_const_state *const_state) in ir3_setup_const_state() argument
857 memset(&const_state->offsets, ~0, sizeof(const_state->offsets)); in ir3_setup_const_state()
859 ir3_nir_scan_driver_consts(compiler, nir, const_state); in ir3_setup_const_state()
862 const_state->num_driver_params = in ir3_setup_const_state()
863 MAX2(const_state->num_driver_params, IR3_DP_VTXCNT_MAX + 1); in ir3_setup_const_state()
866 const_state->num_ubos = nir->info.num_ubos; in ir3_setup_const_state()
868 debug_assert((const_state->ubo_state.size % 16) == 0); in ir3_setup_const_state()
869 unsigned constoff = const_state->ubo_state.size / 16; in ir3_setup_const_state()
872 if (const_state->num_ubos > 0) { in ir3_setup_const_state()
873 const_state->offsets.ubo = constoff; in ir3_setup_const_state()
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Dir3_cp.c209 struct ir3_const_state *const_state = ir3_const_state(ctx->so); in lower_immed() local
210 if (const_state->immediates_count == const_state->immediates_size) { in lower_immed()
211 const_state->immediates = rerzalloc( in lower_immed()
212 const_state, const_state->immediates, in lower_immed()
213 __typeof__(const_state->immediates[0]), const_state->immediates_size, in lower_immed()
214 const_state->immediates_size + 4); in lower_immed()
215 const_state->immediates_size += 4; in lower_immed()
217 for (int i = const_state->immediates_count; in lower_immed()
218 i < const_state->immediates_size; i++) in lower_immed()
219 const_state->immediates[i] = 0xd0d0d0d0; in lower_immed()
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Dir3_nir_analyze_ubo_ranges.c362 struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_analyze_ubo_ranges() local
363 struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_nir_analyze_ubo_ranges()
422 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_lower_ubo_loads() local
423 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_nir_lower_ubo_loads()
529 struct ir3_const_state *const_state = data; in ir3_nir_lower_load_const_instr() local
535 if (const_state->constant_data_ubo == -1) { in ir3_nir_lower_load_const_instr()
538 const_state->constant_data_ubo = b->shader->info.num_ubos++; in ir3_nir_lower_load_const_instr()
552 nir_ssa_def *index = nir_imm_int(b, const_state->constant_data_ubo); in ir3_nir_lower_load_const_instr()
584 struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_lower_load_constant() local
586 const_state->constant_data_ubo = -1; in ir3_nir_lower_load_constant()
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Dir3_assembler.c43 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in ir3_parse_asm()
Dir3_shader.c338 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in alloc_variant()
688 const struct ir3_const_state *const_state = ir3_const_state(so); in ir3_shader_disasm() local
689 for (i = 0; i < DIV_ROUND_UP(const_state->immediates_count, 4); i++) { in ir3_shader_disasm()
690 fprintf(out, "@const(c%d.x)\t", const_state->offsets.immediate + i); in ir3_shader_disasm()
692 const_state->immediates[i * 4 + 0], in ir3_shader_disasm()
693 const_state->immediates[i * 4 + 1], in ir3_shader_disasm()
694 const_state->immediates[i * 4 + 2], in ir3_shader_disasm()
695 const_state->immediates[i * 4 + 3]); in ir3_shader_disasm()
Dir3_parser.y211 struct ir3_const_state *const_state = ir3_const_state(variant); in add_const() local
214 if (idx * 4 + 4 > const_state->immediates_size) { in add_const()
215 const_state->immediates = rerzalloc(const_state, in add_const()
216 const_state->immediates, in add_const()
217 __typeof__(const_state->immediates[0]), in add_const()
218 const_state->immediates_size, in add_const()
220 for (unsigned i = const_state->immediates_size; i < idx * 4; i++) in add_const()
221 const_state->immediates[i] = 0xd0d0d0d0; in add_const()
222 const_state->immediates_size = const_state->immediates_count = idx * 4 + 4; in add_const()
224 const_state->immediates[idx * 4 + 0] = c0; in add_const()
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Dir3_a4xx.c201 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in get_image_offset() local
202 unsigned cb = regid(const_state->offsets.image_dims, 0) + in get_image_offset()
203 const_state->image_dims.off[index]; in get_image_offset()
205 debug_assert(const_state->image_dims.mask & (1 << index)); in get_image_offset()
Dir3_shader.h500 struct ir3_const_state *const_state; member
761 return v->nonbinning->const_state; in ir3_const_state()
762 return v->const_state; in ir3_const_state()
Dir3_nir.h66 struct ir3_const_state *const_state);
Dir3_compiler_nir.c105 struct ir3_const_state *const_state = ir3_const_state(ctx->so); in create_driver_param() local
106 unsigned n = const_state->offsets.driver_param; in create_driver_param()
781 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic_load_ubo() local
782 unsigned ubo = regid(const_state->offsets.ubo, 0); in emit_intrinsic_load_ubo()
804 const_state->offsets.ubo + (ctx->s->info.num_ubos * ptrsz)); in emit_intrinsic_load_ubo()
1638 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic() local
1639 const unsigned primitive_param = const_state->offsets.primitive_param * 4; in emit_intrinsic()
1640 const unsigned primitive_map = const_state->offsets.primitive_map * 4; in emit_intrinsic()
1666 MAX2(ctx->so->constlen, const_state->ubo_state.size / 16); in emit_intrinsic()
3224 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_stream_out() local
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/third_party/mesa3d/src/gallium/drivers/freedreno/ir3/
Dir3_const.h118 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_constant_data() local
119 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_emit_constant_data()
123 if (ubo != const_state->constant_data_ubo) in ir3_emit_constant_data()
159 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_user_consts() local
160 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_emit_user_consts()
166 ubo == const_state->constant_data_ubo) { in ir3_emit_user_consts()
207 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_ubos() local
208 uint32_t offset = const_state->offsets.ubo; in ir3_emit_ubos()
217 uint32_t params = const_state->num_ubos; in ir3_emit_ubos()
222 if (i == const_state->constant_data_ubo) { in ir3_emit_ubos()
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Dir3_cmdline.c428 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in main()
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_const.c115 const struct ir3_const_state *const_state = ir3_const_state(s); in emit_tess_bos() local
116 const unsigned regid = const_state->offsets.primitive_param * 4 + 4; in emit_tess_bos()
132 const struct ir3_const_state *const_state = ir3_const_state(v); in emit_stage_tess_consts() local
133 const unsigned regid = const_state->offsets.primitive_param; in emit_stage_tess_consts()
211 const struct ir3_const_state *const_state = ir3_const_state(v); in fd6_emit_ubos() local
212 int num_ubos = const_state->num_ubos; in fd6_emit_ubos()
228 if (i == const_state->constant_data_ubo) { in fd6_emit_ubos()
262 struct ir3_const_state *const_state = ir3_const_state(v); in user_consts_cmdstream_size() local
263 struct ir3_ubo_analysis_state *ubo_state = &const_state->ubo_state; in user_consts_cmdstream_size()
273 size += 2 * const_state->num_ubos; in user_consts_cmdstream_size()
/third_party/mesa3d/src/freedreno/computerator/
Da6xx.c246 const struct ir3_const_state *const_state = ir3_const_state(v); in cs_const_emit() local
247 uint32_t base = const_state->offsets.immediate; in cs_const_emit()
248 int size = DIV_ROUND_UP(const_state->immediates_count, 4); in cs_const_emit()
253 const_state->immediates[idx * 4 + 0] = grid[0]; in cs_const_emit()
254 const_state->immediates[idx * 4 + 1] = grid[1]; in cs_const_emit()
255 const_state->immediates[idx * 4 + 2] = grid[2]; in cs_const_emit()
265 const_state->immediates[idx * 4 + 1] = iova >> 32; in cs_const_emit()
266 const_state->immediates[idx * 4 + 0] = (iova << 32) >> 32; in cs_const_emit()
280 emit_const(ring, base, size, const_state->immediates); in cs_const_emit()
Da4xx.c208 const struct ir3_const_state *const_state = ir3_const_state(v); in cs_const_emit() local
209 uint32_t base = const_state->offsets.immediate; in cs_const_emit()
210 int size = DIV_ROUND_UP(const_state->immediates_count, 4); in cs_const_emit()
222 emit_const(ring, kernel, base, size, const_state->immediates); in cs_const_emit()
/third_party/mesa3d/src/freedreno/vulkan/
Dtu_pipeline.c398 const struct ir3_const_state *const_state = ir3_const_state(xs); in tu_xs_get_immediates_packet_size_dwords() local
399 uint32_t base = const_state->offsets.immediate; in tu_xs_get_immediates_packet_size_dwords()
400 int32_t size = DIV_ROUND_UP(const_state->immediates_count, 4); in tu_xs_get_immediates_packet_size_dwords()
558 const struct ir3_const_state *const_state = ir3_const_state(xs); in tu6_emit_xs() local
559 uint32_t base = const_state->offsets.immediate; in tu6_emit_xs()
572 tu_cs_emit_array(cs, const_state->immediates, immediate_size); in tu6_emit_xs()
575 if (const_state->constant_data_ubo != -1) { in tu6_emit_xs()
581 CP_LOAD_STATE6_0_DST_OFF(const_state->constant_data_ubo) | in tu6_emit_xs()
594 const struct ir3_ubo_analysis_state *ubo_state = &const_state->ubo_state; in tu6_emit_xs()
597 if (ubo_state->range[i].ubo.block != const_state->constant_data_ubo || in tu6_emit_xs()
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Dtu_cmd_buffer.c3296 const struct ir3_ubo_analysis_state *state = &link->const_state.ubo_state; in tu6_user_consts_size()
3346 const struct ir3_const_state *const_state = &link->const_state; in tu6_emit_user_consts() local
3347 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in tu6_emit_user_consts()
3386 assert(state->range[i].ubo.block == const_state->constant_data_ubo); in tu6_emit_user_consts()
4105 const struct ir3_const_state *const_state = &link->const_state; in vs_params_offset() local
4107 if (const_state->offsets.driver_param >= link->constlen) in vs_params_offset()
4116 assert(const_state->offsets.driver_param != 0); in vs_params_offset()
4118 return const_state->offsets.driver_param; in vs_params_offset()
4427 const struct ir3_const_state *const_state = &link->const_state; in tu_emit_compute_driver_params() local
4428 uint32_t offset = const_state->offsets.driver_param; in tu_emit_compute_driver_params()
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Dtu_private.h1168 struct ir3_const_state const_state; member
/third_party/mesa3d/docs/relnotes/
D20.2.0.rst4117 - freedreno/ir3: add accessor for const_state
4119 - freedreno/ir3: move ubo_state into const_state
4124 - freedreno/ir3: move num_reserved_user_consts out of const_state
4125 - freedreno/ir3: un-embed const_state
4126 - freedreno/ir3: move const_state back to variant