Searched refs:cp_coher_cntl (Results 1 – 5 of 5) sorted by relevance
95 unsigned cp_coher_cntl = 0; in r600_flush_emit() local159 cp_coher_cntl |= S_0085F0_FULL_CACHE_ENA(1); in r600_flush_emit()171 cp_coher_cntl |= S_0085F0_SH_ACTION_ENA(1) | in r600_flush_emit()176 cp_coher_cntl |= rctx->has_vertex_cache ? S_0085F0_VC_ACTION_ENA(1) in r600_flush_emit()182 cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1) | in r600_flush_emit()191 cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | in r600_flush_emit()201 cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1) | in r600_flush_emit()212 cp_coher_cntl |= S_0085F0_CB8_DEST_BASE_ENA(1) | in r600_flush_emit()220 cp_coher_cntl |= S_0085F0_SO0_DEST_BASE_ENA(1) | in r600_flush_emit()233 cp_coher_cntl |= S_0085F0_CB1_DEST_BASE_ENA(1) | in r600_flush_emit()[all …]
561 void si_emit_surface_sync(struct si_context *sctx, struct radeon_cmdbuf *cs, unsigned cp_coher_cntl) in si_emit_surface_sync() argument569 cp_coher_cntl |= 1u << 31; /* don't sync PFP, i.e. execute the sync in ME */ in si_emit_surface_sync()576 radeon_emit(cp_coher_cntl); /* CP_COHER_CNTL */ in si_emit_surface_sync()585 radeon_emit(cp_coher_cntl); /* CP_COHER_CNTL */ in si_emit_surface_sync()805 uint32_t cp_coher_cntl = 0; in si_emit_cache_flush() local824 cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1); in si_emit_cache_flush()826 cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1); in si_emit_cache_flush()830 cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1) | S_0085F0_CB0_DEST_BASE_ENA(1) | in si_emit_cache_flush()842 cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1); in si_emit_cache_flush()980 cp_coher_cntl | S_0085F0_TC_ACTION_ENA(1) | S_0085F0_TCL1_ACTION_ENA(1) | in si_emit_cache_flush()[all …]
101 unsigned cp_coher_cntl = S_0301F0_SH_ICACHE_ACTION_ENA(1) | in si_create_shadowing_ib_preamble() local108 si_pm4_cmd_add(pm4, cp_coher_cntl); /* CP_COHER_CNTL */ in si_create_shadowing_ib_preamble()
1446 unsigned cp_coher_cntl);
940 si_emit_acquire_mem(struct radeon_cmdbuf *cs, bool is_mec, bool is_gfx9, unsigned cp_coher_cntl) in si_emit_acquire_mem() argument945 radeon_emit(cs, cp_coher_cntl); /* CP_COHER_CNTL */ in si_emit_acquire_mem()954 radeon_emit(cs, cp_coher_cntl); /* CP_COHER_CNTL */ in si_emit_acquire_mem()1142 unsigned cp_coher_cntl = 0; in si_cs_emit_cache_flush() local1154 cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1); in si_cs_emit_cache_flush()1158 cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1); in si_cs_emit_cache_flush()1164 cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1) | S_0085F0_CB0_DEST_BASE_ENA(1) | in si_cs_emit_cache_flush()1180 cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1); in si_cs_emit_cache_flush()1276 if ((cp_coher_cntl || (flush_bits & (RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_INV_VCACHE | in si_cs_emit_cache_flush()1288 cp_coher_cntl | S_0085F0_TC_ACTION_ENA(1) | S_0085F0_TCL1_ACTION_ENA(1) | in si_cs_emit_cache_flush()[all …]