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Searched refs:ex_desc (Results 1 – 10 of 10) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_eu.h343 uint32_t ex_desc) in brw_message_ex_desc_ex_mlen() argument
345 return GET_BITS(ex_desc, 9, 6); in brw_message_ex_desc_ex_mlen()
1420 uint32_t ex_desc) in lsc_bti_ex_desc_base_offset() argument
1423 return GET_BITS(ex_desc, 23, 12); in lsc_bti_ex_desc_base_offset()
1428 uint32_t ex_desc) in lsc_bti_ex_desc_index() argument
1431 return GET_BITS(ex_desc, 31, 24); in lsc_bti_ex_desc_index()
1436 uint32_t ex_desc) in lsc_flat_ex_desc_base_offset() argument
1439 return GET_BITS(ex_desc, 31, 12); in lsc_flat_ex_desc_base_offset()
1452 uint32_t ex_desc) in lsc_bss_ex_desc_index() argument
1455 return GET_BITS(ex_desc, 31, 6); in lsc_bss_ex_desc_index()
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Dbrw_fs_reg_allocate.cpp760 fs_reg ex_desc; in emit_unspill() local
763 ex_desc = component(this->scratch_header, 0); in emit_unspill()
766 ex_desc = brw_imm_ud(0); in emit_unspill()
769 fs_reg srcs[] = { brw_imm_ud(0), ex_desc, header }; in emit_unspill()
825 fs_reg ex_desc; in emit_spill() local
828 ex_desc = component(this->scratch_header, 0); in emit_spill()
831 ex_desc = brw_imm_ud(0); in emit_spill()
834 fs_reg srcs[] = { brw_imm_ud(0), ex_desc, header, src }; in emit_spill()
Dbrw_eu_emit.c456 unsigned desc, unsigned ex_desc) in brw_set_desc_ex() argument
466 brw_inst_set_send_ex_desc(devinfo, inst, ex_desc); in brw_set_desc_ex()
2744 struct brw_reg ex_desc, in brw_send_indirect_split_message() argument
2780 if (ex_desc.file == BRW_IMMEDIATE_VALUE && in brw_send_indirect_split_message()
2782 ((ex_desc.ud | ex_desc_imm) & INTEL_MASK(15, 12)) == 0)) { in brw_send_indirect_split_message()
2783 ex_desc.ud |= ex_desc_imm; in brw_send_indirect_split_message()
2807 if (ex_desc.file == BRW_IMMEDIATE_VALUE) { in brw_send_indirect_split_message()
2812 brw_MOV(p, addr, brw_imm_ud(ex_desc.ud | imm_part)); in brw_send_indirect_split_message()
2814 brw_OR(p, addr, ex_desc, brw_imm_ud(imm_part)); in brw_send_indirect_split_message()
2818 ex_desc = addr; in brw_send_indirect_split_message()
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Dbrw_ir.h161 uint32_t ex_desc; /**< SEND[S] extended message descriptor immediate */ member
Dbrw_fs_generator.cpp323 struct brw_reg ex_desc, in generate_send() argument
334 uint32_t ex_desc_imm = inst->ex_desc | in generate_send()
337 if (ex_desc.file != BRW_IMMEDIATE_VALUE || ex_desc.ud || ex_desc_imm) { in generate_send()
342 desc, desc_imm, ex_desc, ex_desc_imm, in generate_send()
Dbrw_eu_validate.c433 const uint32_t ex_desc = brw_inst_sends_ex_desc(devinfo, inst); in send_restrictions() local
434 ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc); in send_restrictions()
Dbrw_fs.h492 struct brw_reg ex_desc,
Dbrw_fs.cpp3894 fs_reg ex_desc; in lower_uniform_pull_constant_loads() local
3896 ex_desc = brw_imm_ud(lsc_bti_ex_desc(devinfo, surface.ud)); in lower_uniform_pull_constant_loads()
3901 ex_desc = component(payload, 1); in lower_uniform_pull_constant_loads()
3902 ubld.group(1, 0).SHL(ex_desc, surface, brw_imm_ud(24)); in lower_uniform_pull_constant_loads()
3917 inst->src[1] = ex_desc; in lower_uniform_pull_constant_loads()
4794 uint32_t ex_desc = 0; in lower_fb_write_logical_send() local
4799 ex_desc = inst->target << 12 | (src0_alpha.file != BAD_FILE) << 15; in lower_fb_write_logical_send()
4802 ex_desc |= 1 << 20; /* Null Render Target */ in lower_fb_write_logical_send()
4804 inst->ex_desc = ex_desc; in lower_fb_write_logical_send()
5541 inst->ex_desc = 0; in lower_sampler_logical_send_gfx7()
/third_party/mesa3d/docs/relnotes/
D19.3.0.rst1514 - intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).
2088 - intel/compiler: Set "Null Render Target" ex_desc bit on Gen11
D21.1.0.rst2623 - intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND