Searched refs:f32_0 (Results 1 – 7 of 7) sorted by relevance
/third_party/mesa3d/src/amd/llvm/ |
D | ac_llvm_cull.c | 66 neg_w = LLVMBuildFCmp(builder, LLVMRealOLT, pos[i][3], ctx->f32_0, ""); in ac_analyze_position_w() 105 accepted = LLVMBuildFCmp(builder, cond, det, ctx->f32_0, ""); in ac_cull_face() 108 accepted = LLVMBuildFCmp(builder, cond, det, ctx->f32_0, ""); in ac_cull_face() 110 accepted = LLVMBuildFCmp(builder, LLVMRealONE, det, ctx->f32_0, ""); in ac_cull_face()
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D | ac_llvm_build.h | 109 LLVMValueRef f32_0; member
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D | ac_llvm_build.c | 112 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0); in ac_llvm_context_init() 869 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, ""); in ac_prepare_cube_coords() 870 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, ""); in ac_prepare_cube_coords() 1662 loads[num_channels] = ac_to_integer(ctx, num_channels == 3 ? ctx->f32_1 : ctx->f32_0); in ac_build_opencoded_load_format() 2095 assert(!a->lod || a->lod == ctx->i32_0 || a->lod == ctx->f32_0 || !a->level_zero); in ac_build_image_opcode() 3780 return ctx->f32_0; in get_reduction_identity()
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D | ac_nir_to_llvm.c | 294 return LLVMBuildSelect(ctx->builder, src0, ctx->f32_1, ctx->f32_0, ""); in emit_b2f() 352 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, ""); in emit_f2f16() 364 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE, temp, ctx->f32_0, ""); in emit_f2f16() 366 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, ""); in emit_f2f16() 1421 LLVMValueRef default_offset = ctx->f32_0; in lower_gather4_integer() 3968 ctx->ac.f32_0, in visit_intrinsic() 4727 LLVMValueRef zero = args.g16 ? ctx->ac.f16_0 : ctx->ac.f32_0; in visit_tex()
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/third_party/spirv-tools/test/val/ |
D | val_ext_inst_test.cpp | 3264 "%val1 = OpExtInst %u32 %extinst " + ext_inst_name + " %f32_0\n"; 3306 << " %f32_0 %f32_1\n"; 3318 "%val1 = OpExtInst %u32 %extinst " + ext_inst_name + " %f32_0 %f32_1\n"; 3344 "%val1 = OpExtInst %f32 %extinst " + ext_inst_name + " %f32_0 %u32_1\n"; 3368 << " %f32_0 %f32_1 %f32_2\n"; 3380 " %f32_0 %f32_1 %f32_2\n"; 3393 " %u32_0 %f32_0 %f32_1\n"; 3406 " %f32_0 %u32_0 %f32_1\n"; 3419 " %f32_1 %f32_0 %u32_2\n"; 3474 "%val1 = OpExtInst %s32 %extinst " + ext_inst_name + " %f32_0\n"; [all …]
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_shader_llvm_vs.c | 424 const_chan == 0 ? ctx->ac.f32_0 : args->out[chan]); in si_llvm_emit_clipvertex() 626 pos_args[0].out[0] = ctx->ac.f32_0; /* X */ in si_llvm_build_vs_exports() 627 pos_args[0].out[1] = ctx->ac.f32_0; /* Y */ in si_llvm_build_vs_exports() 628 pos_args[0].out[2] = ctx->ac.f32_0; /* Z */ in si_llvm_build_vs_exports() 647 pos_args[1].out[0] = ctx->ac.f32_0; /* X */ in si_llvm_build_vs_exports() 648 pos_args[1].out[1] = ctx->ac.f32_0; /* Y */ in si_llvm_build_vs_exports() 649 pos_args[1].out[2] = ctx->ac.f32_0; /* Z */ in si_llvm_build_vs_exports() 650 pos_args[1].out[3] = ctx->ac.f32_0; /* W */ in si_llvm_build_vs_exports()
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/third_party/mesa3d/src/amd/vulkan/ |
D | radv_nir_to_llvm.c | 650 LLVMValueRef zero = is_float ? ctx->ac.f32_0 : ctx->ac.i32_0; in radv_fixup_vertex_input_fetches() 1001 values[i] = LLVMBuildSelect(ctx->ac.builder, isnan, ctx->ac.f32_0, values[i], ""); in si_llvm_init_export_args() 1256 pos_args[0].out[0] = ctx->ac.f32_0; /* X */ in radv_llvm_export_vs() 1257 pos_args[0].out[1] = ctx->ac.f32_0; /* Y */ in radv_llvm_export_vs() 1258 pos_args[0].out[2] = ctx->ac.f32_0; /* Z */ in radv_llvm_export_vs() 1274 pos_args[1].out[0] = ctx->ac.f32_0; /* X */ in radv_llvm_export_vs() 1275 pos_args[1].out[1] = ctx->ac.f32_0; /* Y */ in radv_llvm_export_vs() 1276 pos_args[1].out[2] = ctx->ac.f32_0; /* Z */ in radv_llvm_export_vs() 1277 pos_args[1].out[3] = ctx->ac.f32_0; /* W */ in radv_llvm_export_vs() 1414 outputs[noutput].values[j] = ctx->ac.f32_0; in handle_vs_outputs_post() [all …]
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