/third_party/mesa3d/src/intel/tools/tests/gen6/ |
D | mad.asm | 3 mad(8) m4<1>.xyzF g9<4,4,1>.xyzzF g6<4,4,1>.xyzzF g30<4,4,1>.xyzzF { align16 NoDDClr … 24 mad(8) g30<1>F g44.4<0,1,0>F -g44.5<0,1,0>F g27<4,4,1>F { align16 1Q }; 41 mad.nz.f0.0(8) g19<1>F -g30.0<0,1,0>F g10<4,4,1>F g17<4,4,1>F { align16 2Q };
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D | or.asm | 10 or.nz.f0.0(16) null<1>UD g28<8,8,1>UD g30<8,8,1>UD { align1 1H };
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D | mov.asm | 51 mov(8) m2<1>F g30<4>F { align16 WE_all 1Q }; 70 mov(8) g30<1>.xyD g3.4<0>.xyyyD { align16 NoDDClr 1Q }; 71 mov(8) g30<1>.wD 0D { align16 NoDDChk 1Q };
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D | cmp.asm | 86 cmp.ge.f0.0(8) g31<1>UD g30<8,8,1>UD g5.7<0,1,0>UD { align1 1Q }; 87 cmp.l.f0.0(8) g32<1>UD g30<8,8,1>UD g5.3<0,1,0>UD { align1 1Q };
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/third_party/mesa3d/src/intel/tools/tests/gen7/ |
D | cmp.asm | 97 cmp.ge.f0.0(8) g31<1>UD g30<8,8,1>UD g5.7<0,1,0>UD { align1 1Q }; 98 cmp.l.f0.0(8) g32<1>UD g30<8,8,1>UD g5.3<0,1,0>UD { align1 1Q }; 107 cmp.g.f0.0(8) g30<1>D g5.1<0,1,0>D 4D { align1 1Q }; 109 cmp.ge.f0.0(8) g30<1>.xyF (abs)g29<4>.xyyyF 0x5d5e0b6bF /* 1e+18F */ { align16 1Q }; 130 cmp.ge.f0.0(8) null<1>F (abs)g30<4>F 0x5d5e0b6bF /* 1e+18F */ { align16 1Q switch }; 135 cmp.ge.f0.0(8) null<1>F g30<8,8,1>F g4.4<0,1,0>F { align1 1Q switch };
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D | mad.asm | 5 mad(8) g116<1>.xyzF g9<4,4,1>.xyzzF g6<4,4,1>.xyzzF g30<4,4,1>.xyzzF { align16 NoDDClr … 26 mad(8) g10<1>.zF -g30<4,4,1>.xF g6.6<0,1,0>F g6.1<0,1,0>F { align16 NoDDChk 1Q };
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D | and.asm | 28 and.nz.f0.0(16) g34<1>UD g32<8,8,1>UD g30<8,8,1>UD { align1 1H };
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D | sel.asm | 3 (+f0.0.any4h) sel(8) g30<1>UD g13<4>UD g12<4>UD { align16 1Q };
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/third_party/mesa3d/src/intel/tools/tests/gen9/ |
D | bfe.asm | 1 bfe(8) g96<1>UD g89<4,4,1>UD g30<4,4,1>UD g91<4,4,1>UD { align16 1Q };
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D | and.asm | 24 and(16) g30<1>UD ~g2.2<0,1,0>D g10<8,8,1>UD { align1 1H };
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D | send.asm | 191 send(8) g2<1>UD g30<8,8,1>UD 0x02480208 193 send(8) g14<1>UD g30<8,8,1>UD 0x02480408 195 send(8) g18<1>UD g30<8,8,1>UD 0x02480608 197 send(8) g22<1>UD g30<8,8,1>UD 0x02480808 239 send(8) null<1>F g30<8,8,1>UD 0x0a0a8357 299 send(8) null<1>F g30<8,8,1>UD 0x08088157 475 send(8) null<1>F g30<8,8,1>F 0x140a0027 579 send(8) null<1>F g30<8,8,1>UD 0x0c0a0067 831 send(8) null<1>F g30<8,8,1>UD 0x0a0a8177 969 send(8) null<1>F g30<8,8,1>UD 0x06088157 [all …]
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D | cmp.asm | 8 cmp.ge.f0.0(16) g30<1>F g26<8,8,1>F g24<8,8,1>F { align1 1H }; 29 cmp.ge.f0.0(8) g30<1>UD g29<8,8,1>UD g5.7<0,1,0>UD { align1 1Q };
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/third_party/mesa3d/src/intel/tools/tests/gen8/ |
D | bfe.asm | 1 bfe(8) g34<1>UD g89<4,4,1>UD g30<4,4,1>UD g91<4,4,1>UD { align16 1Q };
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D | and.asm | 25 and(16) g30<1>UD ~g2.2<0,1,0>D g10<8,8,1>UD { align1 1H };
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D | send.asm | 185 send(8) g2<1>UD g30<8,8,1>UD 0x02480208 187 send(8) g14<1>UD g30<8,8,1>UD 0x02480408 189 send(8) g18<1>UD g30<8,8,1>UD 0x02480608 191 send(8) g22<1>UD g30<8,8,1>UD 0x02480808 233 send(8) null<1>F g30<8,8,1>UD 0x0a0a8357 293 send(8) null<1>F g30<8,8,1>UD 0x08088157 551 send(8) null<1>F g30<8,8,1>F 0x140a0027 677 send(8) null<1>F g30<8,8,1>UD 0x0c0a0067 979 send(8) null<1>F g30<8,8,1>UD 0x0a0a8177 1117 send(8) null<1>F g30<8,8,1>UD 0x06088157 [all …]
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/third_party/mesa3d/src/intel/tools/tests/gen7.5/ |
D | mad.asm | 5 mad(8) g116<1>.xyzF g9<4,4,1>.xyzzF g6<4,4,1>.xyzzF g30<4,4,1>.xyzzF { align16 NoDDClr … 22 mad(8) g30<1>F g44.1<0,1,0>F -g44.0<0,1,0>F g27<4,4,1>F { align16 1Q };
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D | or.asm | 7 or(16) g30<1>UD g28<8,8,1>UD g24<8,8,1>UD { align1 1H };
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/third_party/mesa3d/src/intel/tools/tests/gen4/ |
D | sel.asm | 5 (+f0.0) sel(16) g6<1>UD g30<8,8,1>UD 0x3f800000UD { align1 compr };
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D | mul.asm | 29 mul.sat(8) m6<1>.xyzF g32<4>.xF g30<4>.xyzzF { align16 NoDDClr };
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D | send.asm | 73 send(8) 1 g30<1>.xF (abs)g30<4>.xF 0x01110005
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/third_party/mesa3d/src/intel/tools/tests/gen5/ |
D | mul.asm | 32 mul.sat(8) m6<1>.xyzF g32<4>.xF g30<4>.xyzzF { align16 NoDDClr };
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D | send.asm | 63 send(8) 1 g30<1>.xF (abs)g30<4>.xF 0x02100005 133 send(8) 2 g30<1>UW null<8,8,1>F 0x0241a203 135 send(8) 2 g30<1>UW null<8,8,1>F 0x04410203
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/third_party/mesa3d/src/intel/tools/tests/gen4.5/ |
D | mul.asm | 29 mul.sat(8) m6<1>.xyzF g32<4>.xF g30<4>.xyzzF { align16 NoDDClr };
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D | sel.asm | 5 (+f0.0) sel(16) m3<1>UD g30<8,8,1>UD 0x3f800000UD { align1 compr4 };
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D | send.asm | 87 send(8) 1 g30<1>.xF (abs)g30<4>.xF 0x01110005
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