| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUGlobalISelUtils.cpp | 28 Offset = Op.getCImm()->getZExtValue(); in getBaseWithConstantOffset()
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| D | AMDGPUInstructionSelector.cpp | 1427 ImmOp.ChangeToImmediate(ImmOp.getCImm()->getZExtValue()); in selectG_CONSTANT()
1514 GEPInfo.Imm = OpDef->getOperand(1).getCImm()->getSExtValue(); in getAddrModeInfo()
2145 RHSDef->getOperand(1).getCImm()->getSExtValue(); in selectMUBUFScratchOffen()
2247 RHSDef->getOperand(1).getCImm()->getSExtValue(); in selectDS1Addr1Offset()
2286 MIB.addImm(-MI.getOperand(1).getCImm()->getSExtValue()); in renderNegateImm()
2299 MIB.addImm(Op.getCImm()->getSExtValue()); in renderBitcastImm()
2308 MIB.addImm(MI.getOperand(1).getCImm()->getValue().countPopulation()); in renderPopcntImm()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 88 DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits())); in tryCombineAnyExt()
132 DstReg, CstVal.getCImm()->getValue().zext(DstTy.getSizeInBits())); in tryCombineZExt()
185 DstReg, CstVal.getCImm()->getValue().trunc(DstTy.getSizeInBits())); in tryCombineTrunc()
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| D | InstructionSelectorImpl.h | 254 Value = State.MIs[InsnID]->getOperand(1).getCImm()->getSExtValue(); in executeMatchTable()
278 Value = State.MIs[InsnID]->getOperand(1).getCImm()->getValue(); in executeMatchTable()
648 if (MO.isCImm() && MO.getCImm()->equalsInt(Value)) in executeMatchTable()
918 State.MIs[OldInsnID]->getOperand(1).getCImm()->getSExtValue()); in executeMatchTable()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MIRVRegNamerUtils.cpp | 58 MO.getCImm()->getZExtValue()); in getInstructionOpcodeHash()
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| D | MachineOperand.cpp | 287 return getCImm() == Other.getCImm(); in isIdenticalTo()
352 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCImm()); in hash_value()
799 getCImm()->printAsOperand(OS, /*PrintType=*/true, MST); in print()
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| D | LiveDebugValues.cpp | 210 Loc.CImm = MI.getOperand(0).getCImm(); in VarLoc()
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| D | MachineVerifier.cpp | 988 const ConstantInt *CI = MI->getOperand(1).getCImm(); in verifyPreISelGenericInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CSEInfo.cpp | 357 ID.AddPointer(MO.getCImm()); in addNodeIDMachineOperand()
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| D | Utils.cpp | 237 : CstVal.getCImm()->getValue(); in getConstantVRegValWithLookThrough()
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| D | GISelKnownBits.cpp | 383 return MI.getOperand(1).getCImm()->getValue().getNumSignBits(); in computeNumSignBits()
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| D | LegalizerHelper.cpp | 630 const APInt &Val = MI.getOperand(1).getCImm()->getValue(); in narrowScalar()
1705 const APInt &SrcVal = SrcMO.getCImm()->getValue(); in widenScalar()
3204 MI, KShiftAmt->getOperand(1).getCImm()->getValue(), HalfTy, ShiftAmtTy); in narrowScalarShift()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstructionSelector.cpp | 424 APInt OffsetValue = Offset->getOperand(1).getCImm()->getValue(); in select()
487 I.getOperand(1).getCImm()->getValue(), B)) in select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1385 IsZero = I.getOperand(1).getCImm()->getZExtValue() == 0; in earlySelect()
1664 uint64_t Val = I.getOperand(1).getCImm()->getZExtValue(); in select()
4145 Immed = Root.getCImm()->getZExtValue(); in getImmedFromMO()
4581 if (!RHSOp1.isCImm() || RHSOp1.getCImm()->getBitWidth() > 64) in selectAddrModeUnscaled()
4583 RHSC = RHSOp1.getCImm()->getSExtValue(); in selectAddrModeUnscaled()
4627 int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue(); in selectAddrModeIndexed()
4868 uint64_t CstVal = I.getOperand(1).getCImm()->getZExtValue(); in renderLogicalImm32()
4877 uint64_t CstVal = I.getOperand(1).getCImm()->getZExtValue(); in renderLogicalImm64()
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| D | AArch64LegalizerInfo.cpp | 674 unsigned Amount = CstMI->getOperand(1).getCImm()->getZExtValue(); in legalizeShlAshrLshr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 540 const ConstantInt *getCImm() const { in getCImm() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 972 if (!Val.getCImm()->isZero()) { in select()
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| D | ARMInstrInfo.td | 897 return ARM::isBitFieldInvertedMask(MO.getCImm()->getZExtValue());
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 2633 return !Op.getCImm()->isZero(); in simplifyRCmp0()
2645 return Op.getCImm()->isZero(); in simplifyRCmp0()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 647 Val = I.getOperand(1).getCImm()->getZExtValue(); in selectConstant()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
| D | AsmPrinter.cpp | 902 MI->getOperand(0).getCImm()->getValue().print(OS, false /*isSigned*/); in emitDebugValueComment()
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| D | DwarfDebug.cpp | 254 return DbgValueLoc(Expr, MI->getOperand(0).getCImm()); in getDebugLocValue()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenGlobalISel.inc | 774 return ARM::isBitFieldInvertedMask(MO.getCImm()->getZExtValue());
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