| /third_party/musl/tools/ |
| D | add-cfi.i386.awk | 39 function get_reg() { function
162 register = get_reg() function
172 register = get_reg() function
203 /(dec|inc|not|neg|pop) %e?([abcd][hlx]|si|di|bp)/ { trashed(get_reg()) } function
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| D | add-cfi.x86_64.awk | 34 function get_reg() { function
148 register = get_reg() function
158 register = get_reg() function
190 /(dec|inc|not|neg|pop) %[er]?([abcd][xlh]|si|di|bp|8|9|10|11|12|13|14|15)/ { trashed(get_reg()) } function
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2.c | 305 ra_reg(ctx, get_reg(instr), -1, false, 0); in sched_next()
379 ra_reg(ctx, get_reg(instr_v), -1, is_export(instr_v), in sched_next()
383 ra_reg(ctx, get_reg(instr_s), -1, is_export(instr_s), in sched_next()
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| D | ir2_assemble.c | 65 struct ir2_reg_component *comp = get_reg(instr)->comp; in alu_swizzle()
105 struct ir2_reg_component *comp = get_reg(instr)->comp; in alu_write_mask()
131 struct ir2_reg_component *comp = get_reg(instr)->comp; in fetch_dst_swiz()
147 return get_reg(instr)->idx; in dst_to_reg()
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| D | ir2_private.h | 338 get_reg(struct ir2_instr *instr) in get_reg() function
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| /third_party/libunwind/scripts/ |
| D | kernel-files.txt | 15 $udir/src/mi/Gget_reg.c $kdir/unwind/get_reg.c
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| /third_party/libunwind/include/ |
| D | libunwind-common.h | 248 #define unw_get_reg UNW_OBJ(get_reg)
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| D | libunwind-common.h.in | 250 #define unw_get_reg UNW_OBJ(get_reg)
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | r3xx_vertprog.c | 563 static int get_reg(struct radeon_compiler *c, struct temporary_allocation *ta, bool *hwtemps, in get_reg() function
660 inst->U.I.SrcReg[i].Index = get_reg(c, ta, hwtemps, orig); in allocate_temporary_registers()
670 inst->U.I.DstReg.Index = get_reg(c, ta, hwtemps, orig); in allocate_temporary_registers()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_register_allocation.cpp | 1523 get_reg(ra_ctx& ctx, RegisterFile& reg_file, Temp temp, in get_reg() function
1624 return get_reg(ctx, reg_file, temp, parallelcopies, instr, operand_index); in get_reg()
1726 return get_reg(ctx, reg_file, temp, parallelcopies, instr); in get_reg_create_vector()
1767 return get_reg(ctx, reg_file, temp, parallelcopies, instr); in get_reg_create_vector()
1903 dst = get_reg(ctx, register_file, operand.getTemp(), parallelcopy, instr, operand_index); in get_reg_for_operand()
1995 definition.setFixed(get_reg(ctx, register_file, definition.getTemp(), parallelcopy, phi)); in get_regs_for_phis()
2674 PhysReg reg = get_reg(ctx, register_file, tmp, parallelcopy, instr); in register_allocation()
2682 definition->setFixed(get_reg(ctx, register_file, tmp, parallelcopy, instr)); in register_allocation()
2813 PhysReg reg = get_reg(ctx, tmp_file, tmp, parallelcopy, instr); in register_allocation()
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| /third_party/ltp/tools/sparse/sparse-src/ |
| D | compile-i386.c | 350 static struct storage *get_reg(struct regclass *class) in get_reg() function
377 reg = get_reg(class); in get_reg_value()
387 return get_reg(get_regclass_bits(bit_size)); in temp_from_bits()
1264 reg1 = get_reg(®class_32_8); in emit_compare()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_ra.c | 1116 get_reg(struct ra_ctx *ctx, struct ra_file *file, struct ir3_register *reg, in get_reg() function
1274 physreg_t physreg = get_reg(ctx, file, dst, true); in allocate_dst()
1287 physreg_t physreg = get_reg(ctx, file, dst, false); in allocate_dst()
1705 physreg = get_reg(ctx, file, def, false); in handle_phi()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.0.0.rst | 2749 - aco: move update_renames() out of get_reg()
2817 - aco: add fallback algorithm in get_reg()
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| D | 20.1.0.rst | 1253 - aco: refactor get_reg() to take Temp instead of RegClass
1254 - aco: refactor get_reg() to also handle affinities
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| D | 21.1.0.rst | 4739 - aco: add fallback algorithm in get_reg()
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| /third_party/NuttX/ |
| D | ReleaseNotes | 14191 put_reg/get_reg function was overriding i2c transfer error code with
|