| /third_party/mesa3d/docs/relnotes/ |
| D | 10.2.9.rst | 64 - gallivm: fix idiv
76 - gallivm,tgsi: fix idiv by zero crash
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| D | 10.3.1.rst | 111 - gallivm: fix idiv
131 - gallivm,tgsi: fix idiv by zero crash
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| D | 11.0.7.rst | 114 - nir: fix typo in idiv lowering, causing large-udiv-udiv failures
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| D | 21.3.0.rst | 1141 - gallivm: fix idiv/irem for 8/16/64-bit and 32-bit INT_MIN/-1
3532 - nir/idiv_const: improve idiv(n, INT_MIN)
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| /third_party/ffmpeg/libswresample/x86/ |
| D | resample.asm | 475 idiv src_incrd
483 ; note that for imul/idiv, I need to move filter to edx/eax for each:
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| /third_party/boost/boost/python/ |
| D | operators.hpp | 308 BOOST_PYTHON_INPLACE_OPERATOR(idiv,/=)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 317 "idiv{b}\t$src", []>, Sched<[WriteIDiv8]>;
320 "idiv{w}\t$src", []>, Sched<[WriteIDiv16]>, OpSize16;
323 "idiv{l}\t$src", []>, Sched<[WriteIDiv32]>, OpSize32;
327 "idiv{q}\t$src", []>, Sched<[WriteIDiv64]>;
332 "idiv{b}\t$src", []>, SchedLoadReg<WriteIDiv8>;
335 "idiv{w}\t$src", []>, OpSize16, SchedLoadReg<WriteIDiv16>;
338 "idiv{l}\t$src", []>, OpSize32, SchedLoadReg<WriteIDiv32>;
341 "idiv{q}\t$src", []>, SchedLoadReg<WriteIDiv64>,
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| D | X86InstrInfo.td | 3298 // div and idiv aliases for explicit A register.
3307 def : InstAlias<"idiv{b}\t{$src, %al|al, $src}", (IDIV8r GR8 :$src)>;
3308 def : InstAlias<"idiv{w}\t{$src, %ax|ax, $src}", (IDIV16r GR16:$src)>;
3309 def : InstAlias<"idiv{l}\t{$src, %eax|eax, $src}", (IDIV32r GR32:$src)>;
3310 def : InstAlias<"idiv{q}\t{$src, %rax|rax, $src}", (IDIV64r GR64:$src)>;
3311 def : InstAlias<"idiv{b}\t{$src, %al|al, $src}", (IDIV8m i8mem :$src)>;
3312 def : InstAlias<"idiv{w}\t{$src, %ax|ax, $src}", (IDIV16m i16mem:$src)>;
3313 def : InstAlias<"idiv{l}\t{$src, %eax|eax, $src}", (IDIV32m i32mem:$src)>;
3314 def : InstAlias<"idiv{q}\t{$src, %rax|rax, $src}", (IDIV64m i64mem:$src)>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerX8632.h | 776 void idiv(Type Ty, GPRRegister reg);
777 void idiv(Type Ty, const AsmAddress &address);
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| D | IceAssemblerX8664.h | 772 void idiv(Type Ty, GPRRegister reg);
773 void idiv(Type Ty, const AsmAddress &address);
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| D | IceAssemblerX8632.cpp | 2387 void AssemblerX8632::idiv(Type Ty, GPRRegister reg) { in idiv() function in Ice::X8632::AssemblerX8632
2398 void AssemblerX8632::idiv(Type Ty, const AsmAddress &addr) { in idiv() function in Ice::X8632::AssemblerX8632
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| D | IceInstX8632.cpp | 1027 static const GPREmitterOneOp Emitter = {&Assembler::idiv, &Assembler::idiv}; in emitIAS()
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| D | IceInstX8664.cpp | 1019 static const GPREmitterOneOp Emitter = {&Assembler::idiv, &Assembler::idiv}; in emitIAS()
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| D | IceAssemblerX8664.cpp | 2523 void AssemblerX8664::idiv(Type Ty, GPRRegister reg) { in idiv() function in Ice::X8664::AssemblerX8664
2535 void AssemblerX8664::idiv(Type Ty, const AsmAddress &addr) { in idiv() function in Ice::X8664::AssemblerX8664
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| /third_party/skia/third_party/externals/swiftshader/src/Shader/ |
| D | ShaderCore.hpp | 257 void idiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1);
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| D | VertexProgram.cpp | 259 case Shader::OPCODE_IDIV: idiv(d, s0, s1); break; in program()
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| D | PixelProgram.cpp | 239 case Shader::OPCODE_IDIV: idiv(d, s0, s1); break; in applyShader()
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| D | ShaderCore.cpp | 848 void ShaderCore::idiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) in idiv() function in sw::ShaderCore
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/ |
| D | ARMTargetParser.def | 128 ARM_ARCH_EXT_NAME("idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV), nullptr, nullptr)
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/docs/ |
| D | LOWERING.rst | 163 result in the ``edx:eax`` register pair. The x86-32 ``idiv`` instruction
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| /third_party/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 435 #define IDIV_L(a) CHOICE(idivl a, idivl a, _LTOG idiv a)
436 #define IDIV_W(a) CHOICE(idivw a, idivw a, _WTOG idiv a)
1164 #define IDIV_L(a) idiv L_(a)
1165 #define IDIV_W(a) idiv W_(a)
1166 #define IDIV_B(a) idiv B_(a)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | ARMTargetParser.def | 154 ARM_ARCH_EXT_NAME("idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB), nullptr, nullptr)
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | GPRArith.cpp | 1279 TestImplOp(idiv, Value0, Src, Value1, int, Size); \ in TEST_F()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | GPRArith.cpp | 1309 TestImplOp(idiv, Value0, Src, Value1, int, Size); \ in TEST_F()
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| /third_party/vk-gl-cts/external/vulkancts/data/vulkan/amber/graphicsfuzz/ |
| D | index.txt | 236 …v-round-to-zero", "A fragment shader that covers specific fast idiv code path" },
|