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/third_party/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimd16intrin.h50 #define _simd16_extract_ps(a, imm8) SIMD16::extract_ps<imm8>(a) argument
51 #define _simd16_extract_si(a, imm8) SIMD16::extract_si<imm8>(a) argument
52 #define _simd16_insert_ps(a, b, imm8) SIMD16::insert_ps<imm8>(a, b) argument
53 #define _simd16_insert_si(a, b, imm8) SIMD16::insert_si<imm8>(a, b) argument
151 #define _simd16_shuffle_epi32(a, b, imm8) SIMD16::shuffle_epi32<imm8>(a, b) argument
152 #define _simd16_shuffle_epi64(a, b, imm8) SIMD16::shuffle_epi64<imm8>(a, b) argument
Dsimdintrin.h163 #define _simd_shuffle_epi32(a, b, imm8) SIMD::shuffle_epi32<imm8>(a, b) argument
164 #define _simd_shuffle_epi64(a, b, imm8) SIMD::shuffle_epi64<imm8>(a, b) argument
Dsimdlib_512_emu.inl570 // dst[127:0] : = SELECT4(a[511:0], imm8[1:0])
571 // dst[255:128] : = SELECT4(a[511:0], imm8[3:2])
572 // dst[383:256] : = SELECT4(b[511:0], imm8[5:4])
573 // dst[511:384] : = SELECT4(b[511:0], imm8[7:6])
/third_party/openssl/crypto/perlasm/
Dppc-xlate.pl290 my ($f, $vrt, $imm8) = @_;
291 $imm8 = oct($imm8) if ($imm8 =~ /^0/);
292 $imm8 &= 0xff;
293 " .long ".sprintf "0x%X",(60<<26)|($vrt<<21)|($imm8<<11)|(360<<1)|1;
/third_party/boost/libs/units/example/
Dsystems.cpp461 quantity<ton_mass> imm8(1.0*tons); in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM() local
470 << imm8 << " = " << quantity<si::mass>(imm8) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
473 … std::cout << imm8 << "/" << imm1 << " = " << quantity<si::dimensionless>(imm8/imm1) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
474 … << imm8 << "/" << imm2 << " = " << quantity<si::dimensionless>(imm8/imm2) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
475 … << imm8 << "/" << imm3 << " = " << quantity<si::dimensionless>(imm8/imm3) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
476 … << imm8 << "/" << imm4 << " = " << quantity<si::dimensionless>(imm8/imm4) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
477 … << imm8 << "/" << imm5 << " = " << quantity<si::dimensionless>(imm8/imm5) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
478 … << imm8 << "/" << imm6 << " = " << quantity<si::dimensionless>(imm8/imm6) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
479 … << imm8 << "/" << imm7 << " = " << quantity<si::dimensionless>(imm8/imm7) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
489 << imm8 << " = " << quantity<grain_mass>(imm8) << std::endl in BOOST_UNITS_DEFINE_SINGLE_UNIT_SYSTEM()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrThumb.td168 // t_addrmode_pc := <label> => pc + imm8 * 4
271 // t_addrmode_sp := sp + imm8 * 4
395 // ADD <Rd>, sp, #<imm8>
940 bits<8> imm8;
942 let Inst{7-0} = imm8;
966 (ins tGPR:$Rn, imm0_255:$imm8), IIC_iALUi,
967 "add", "\t$Rdn, $imm8",
968 [(set tGPR:$Rdn, (add tGPR:$Rn, imm8_255:$imm8))]>,
1000 def tADDSi8 : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, imm0_255:$imm8),
1003 imm8_255:$imm8))]>,
[all …]
DARMInstrInfo.td741 /// imm8 predicate - Immediate is exactly 8.
743 def imm8 : Operand<i32>, ImmLeaf<i32, [{ return Imm == 8; }]> {
1002 // {8} 1 is imm8 is non-negative. 0 otherwise.
1003 // {7-0} [0,255] imm8 value.
1014 // {8} 1 is imm8 is non-negative. 0 otherwise.
1015 // {7-0} [0,255] imm8 value, scaled by 4.
1066 // addrmode3 := reg +/- imm8
1109 // addrmode5 := reg +/- imm8*4
1128 // addrmode5fp16 := reg +/- imm8*2
2782 let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm
[all …]
DARMInstrFormats.td849 let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm
881 // {13} 1 == imm8, 0 == Rm
907 let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm
1597 let Inst{7-0} = addr{7-0}; // imm8
1622 let Inst{7-0} = addr{7-0}; // imm8
1649 let Inst{7-0} = addr{7-0}; // imm8
DARMInstrThumb2.td215 // t2addrmode_posimm8 := reg + imm8
228 // t2addrmode_negimm8 := reg - imm8
242 // t2addrmode_imm8 := reg +/- imm8
271 // t2addrmode_imm8s4 := reg +/- (imm8 << 2)
305 // They are printed the same way as the imm8 version
310 // They are printed the same way as the imm8 version
316 // They are printed the same way as the imm8 version
323 // t2addrmode_imm0_1020s4 := reg + (imm8 << 2)
1166 /// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns.
1258 /// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns.
[all …]
DARMInstrMVE.td166 // They are printed the same way as the T2 imm8 version
195 // They are printed the same way as the imm8 version
211 // They are printed the same way as the imm8 version
228 // They are printed the same way as the imm8 version
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrFormats.td114 // Format RI instruction class in Mips : <|opcode|rx|imm8|>
122 bits<8> imm8;
127 let Inst{7-0} = imm8;
314 // Format i8 instruction class in Mips : <|opcode|funct|imm8>
322 bits<8> imm8;
328 let Inst{7-0} = imm8;
/third_party/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
Dbuilder_misc.h202 Value* VEXTRACTI128(Value* a, Constant* imm8);
203 Value* VINSERTI128(Value* a, Value* b, Constant* imm8);
Dbuilder_misc.cpp993 Value* Builder::VEXTRACTI128(Value* a, Constant* imm8) in VEXTRACTI128() argument
995 bool flag = !imm8->isZeroValue(); in VEXTRACTI128()
1004 Value* Builder::VINSERTI128(Value* a, Value* b, Constant* imm8) in VINSERTI128() argument
1006 bool flag = !imm8->isZeroValue(); in VINSERTI128()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrArithmetic.td580 /// Imm8Operand - This is the operand kind to use for an imm8 of this type.
582 /// only used for instructions that have a sign-extended imm8 field form.
764 // BinOpRI8 - Instructions like "add reg, reg, imm8".
774 // BinOpRI8_F - Instructions like "cmp reg, imm8".
781 // BinOpRI8_RF - Instructions like "add reg, reg, imm8".
788 // BinOpRI8_RFF - Instructions like "adc reg, reg, imm8".
859 // BinOpMI8 - Instructions like "add [mem], imm8".
868 // BinOpMI8_RMW - Instructions like "add [mem], imm8".
876 // BinOpMI8_RMW_FF - Instructions like "adc [mem], imm8".
884 // BinOpMI8_F - Instructions like "cmp [mem], imm8".
[all …]
DX86InstrXOP.td243 // Instruction where second source can be memory, third must be imm8
DX86InstrCompiler.td1410 "", // orb/addb REG, imm8
1414 "", // orw/addw REG, imm8
1422 "", // orl/addl REG, imm8
1431 "", // orq/addq REG, imm8
DX86InstrShiftRotate.td457 // FIXME: provide shorter instructions when imm8 == 1
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DSVEInstrFormats.td1124 : I<(outs ZPR8:$Zdn), (ins ZPR8:$_Zdn, ZPR8:$Zm, imm0_255:$imm8),
1125 asm, "\t$Zdn, $_Zdn, $Zm, $imm8",
1129 bits<8> imm8;
1131 let Inst{20-16} = imm8{7-3};
1133 let Inst{12-10} = imm8{2-0};
1150 : I<(outs ZPR8:$Zd), (ins ZZ_b:$Zn, imm0_255:$imm8),
1151 asm, "\t$Zd, $Zn, $imm8",
1155 bits<8> imm8;
1157 let Inst{20-16} = imm8{7-3};
1159 let Inst{12-10} = imm8{2-0};
[all …]
DAArch64InstrInfo.td5359 [(set (v2f64 V128:$Rd), (AArch64fmov imm0_255:$imm8))]>;
5362 [(set (v2f32 V64:$Rd), (AArch64fmov imm0_255:$imm8))]>;
5365 [(set (v4f32 V128:$Rd), (AArch64fmov imm0_255:$imm8))]>;
5369 [(set (v4f16 V64:$Rd), (AArch64fmov imm0_255:$imm8))]>;
5372 [(set (v8f16 V128:$Rd), (AArch64fmov imm0_255:$imm8))]>;
5380 [(set FPR64:$Rd, simdimmtype10:$imm8)]>;
5394 [(set (v2i64 V128:$Rd), (AArch64movi_edit imm0_255:$imm8))]>;
5432 def : Pat<(v2i32 (AArch64movi_shift imm0_255:$imm8, (i32 imm:$shift))),
5433 (MOVIv2i32 imm0_255:$imm8, imm:$shift)>;
5434 def : Pat<(v4i32 (AArch64movi_shift imm0_255:$imm8, (i32 imm:$shift))),
[all …]
DAArch64InstrFormats.td7436 bits<8> imm8;
7441 let Inst{18-16} = imm8{7-5};
7444 let Inst{9-5} = imm8{4-0};
7453 !con((ins immtype:$imm8), opt_shift_iop), asm,
7454 "{\t$Rd" # kind # ", $imm8" # opt_shift #
7455 "|" # kind # "\t$Rd, $imm8" # opt_shift # "}",
7465 !con((ins vectype:$Rd, immtype:$imm8), opt_shift_iop),
7466 asm, "{\t$Rd" # kind # ", $imm8" # opt_shift #
7467 "|" # kind # "\t$Rd, $imm8" # opt_shift # "}",
7542 imm0_255:$imm8,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h185 uint32_t imm8 = (immediate << 2*rot) | (immediate >> (32 - 2*rot));
186 if (imm8 < (1 << kImmed8Bits)) {
188 o->encoding_ = (rot << kRotateShift) | (imm8 << kImmed8Shift);
Dassembler_arm.cc898 uint8_t imm8 = ((imm32 >> 31) << 7) | (((imm32 >> 29) & 1) << 6) |
900 EmitVFPsss(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | (imm8 & 0xf),
916 uint8_t imm8 = ((imm64 >> 63) << 7) | (((imm64 >> 61) & 1) << 6) |
918 EmitVFPddd(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | B8 | (imm8 & 0xf),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86Disassembler.cpp1394 uint8_t imm8; in readImmediate() local
1408 if (consume(insn, imm8)) in readImmediate()
1410 insn->immediates[insn->numImmediatesConsumed] = imm8; in readImmediate()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2310 unsigned imm8 = fieldFromInstruction(Insn, 0, 8); in DecodeHINTInstruction() local
2316 Inst.addOperand(MCOperand::createImm(imm8)); in DecodeHINTInstruction()
2323 if (imm8 == 0x10 && pred != 0xe && ((FeatureBits[ARM::FeatureRAS]) != 0)) in DecodeHINTInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenMCCodeEmitter.inc7456 // op: imm8
10137 // op: imm8
10151 // op: imm8
10170 // op: imm8
10189 // op: imm8
11064 // op: imm8
11083 // op: imm8
14014 // op: imm8
14320 // op: imm8
15026 // op: imm8

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