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Searched refs:isFP64 (Results 1 – 9 of 9) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceRegistersARM32.h31 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
45 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
56 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
67 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
78 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
118 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumGPRegs() argument
133 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumGPRs() argument
168 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumSRegs() argument
188 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumDRegs() argument
189 +(isFP64) in getNumDRegs()
DIceRegistersMIPS32.h31 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
45 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
57 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
DIceInstMIPS32.def41 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
113 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
180 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
188 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
216 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
220 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
260 isFP32, isFP64, isVec128, alias_init */ \
267 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
DIceInstARM32.def38 // isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
46 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
53 // isGPR, isInt, isFP32, isFP64, isVec128, alias_init)
DIceTargetLoweringARM32.cpp102 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
108 isFP32, isFP64, \
240 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
249 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
258 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
267 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
276 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
1035 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getPhysicalRegister() argument
1038 : ((isFP64) ? IceType_f64 : ((isVec128 ? IceType_v4i32 : IceType_i32))), in getPhysicalRegister()
DIceTargetLoweringMIPS32.cpp153 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in staticInit() argument
157 Float64Registers[RegMIPS32::val] = isFP64; \ in staticInit()
1008 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
2306 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getRegisterSet() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp58 bool isFP64() const { return STI.getFeatureBits()[Mips::FeatureFP64Bit]; } in isFP64() function in __anon6faee9de0111::MipsDisassembler
1280 if (isFP64()) { in getInstruction()
1376 if (isFP64()) { in getInstruction()
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/spirv_assembly/
DvktSpvAsmFloatControlsTests.cpp2232 bool isFP64 = typeTestResults->floatType() == FP64; in build() local
2238 if (isFP64 && !zc.supportedByFP64) in build()
2261 if (isFP64 && !zc.supportedByFP64) in build()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp355 bool isFP64() const { return isReg(FP64Reg); } in isFP64() function in __anonaf2815aa0111::SystemZOperand