| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonDepInstrInfo.td | 628 let isPredicated = 1;
644 let isPredicated = 1;
660 let isPredicated = 1;
680 let isPredicated = 1;
701 let isPredicated = 1;
720 let isPredicated = 1;
741 let isPredicated = 1;
756 let isPredicated = 1;
772 let isPredicated = 1;
786 let isPredicated = 1;
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| D | HexagonVLIWPacketizer.cpp | 360 return HII->isPredicated(MI) && HII->getDotNewPredOp(MI, nullptr) > 0; in isNewifiable()
562 if (!HII->isPredicated(MI)) in getPredicateSense()
693 if (HII->isPredicated(PacketMI)) { in canPromoteToNewValueStore()
694 if (!HII->isPredicated(MI)) in canPromoteToNewValueStore()
918 if (!HII->isPredicated(*I)) in restrictingDepExistInPacket()
945 assert(QII->isPredicated(MI) && "Must be predicated instruction"); in getPredicatedRegister()
1200 if (HII->isPredicated(I) || HII->isPredicated(J)) in hasDeadDependence()
1240 if (HII->isPredicated(MI) && HII->isPredicatedNew(MI) && HII->isJumpR(MI)) in hasControlDependence()
1461 if (HII->isPredicated(I) && HII->isPredicated(J) && in isLegalToPacketizeTogether()
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| D | HexagonInstrFormatsV5.td | 54 bits<1> isPredicated = 0;
55 let TSFlags{7} = isPredicated;
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| D | HexagonInstrFormats.td | 84 bits<1> isPredicated = 0;
85 let TSFlags{10} = isPredicated;
179 let PredSense = !if(isPredicated, !if(isPredicatedFalse, "false", "true"),
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| D | HexagonExpandCondsets.cpp | 343 if (HII->isPredicated(*DefI)) in updateKillFlags()
421 if (HII->isPredicated(*DefI)) in updateDeadsInRange()
491 if (!HII->isPredicated(*DefI)) in updateDeadsInRange()
723 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable()
758 if (PredValid && HII->isPredicated(*MI)) { in getReachingDefForPred()
916 if (!HII->isPredicated(*MI)) in renameInRange()
989 if (PredValid && HII->isPredicated(*MI) && MI->readsRegister(PredR)) in predicate()
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| D | HexagonInstrInfo.h | 222 bool isPredicated(const MachineInstr &MI) const override;
387 bool isPredicated(unsigned Opcode) const;
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| D | HexagonPeephole.cpp | 238 if (QII->isPredicated(MI)) { in runOnMachineFunction()
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| D | Hexagon.td | 286 let RowFields = ["BaseOpcode", "PNewValue", "PredSense", "isBranch", "isPredicated"];
294 let RowFields = ["BaseOpcode", "PNewValue", "PredSense", "isBranch", "isPredicated"];
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| D | HexagonInstrInfo.cpp | 605 if (Term != MBB.end() && isPredicated(*Term) && in insertBranch()
1557 bool HexagonInstrInfo::isPredicated(const MachineInstr &MI) const { in isPredicated() function in HexagonInstrInfo
2135 if (isNewValueInst(MI) || (isPredicated(MI) && isPredicatedNew(MI))) in isDotNewInst()
2419 return isNewValue(Opcode) && get(Opcode).isBranch() && isPredicated(Opcode); in isNewValueJump()
2442 assert(isPredicated(MI)); in isPredicatedNew()
2448 assert(isPredicated(Opcode)); in isPredicatedNew()
2466 bool HexagonInstrInfo::isPredicated(unsigned Opcode) const { in isPredicated() function in HexagonInstrInfo
3143 if (Cond.empty() || !isPredicated(Cond[0].getImm())) in predOpcodeHasNot()
3208 if (isPredicated(MI)) { in getBaseAndOffsetPosition()
3675 if (isPredicated(NewOp) && isPredicatedNew(NewOp)) { // Get predicate old form in getDotOldOp()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCInstrInfo.cpp | 181 while (isPredicated(*I) || I->isTerminator() || I->isDebugValue()) { in analyzeBranch()
213 CantAnalyze = !isPredicated(*I); in analyzeBranch()
221 if (!isPredicated(*I) && (isUncondBranchOpcode(I->getOpcode()) || in analyzeBranch()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CriticalAntiDepBreaker.cpp | 183 MI.isCall() || MI.hasExtraSrcRegAllocReq() || TII->isPredicated(MI); in PrescanInstruction()
258 if (!TII->isPredicated(MI)) { in ScanInstruction()
614 if (MI.isCall() || MI.hasExtraDefRegAllocReq() || TII->isPredicated(MI)) in BreakAntiDependencies()
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| D | IfConversion.cpp | 1110 bool isPredicated = TII->isPredicated(MI); in ScanInstructions() local
1122 if (!isPredicated) { in ScanInstructions()
1137 if (BBI.ClobbersPred && !isPredicated) { in ScanInstructions()
1992 bool BB1Predicated = BBI1T != MBB1.end() && TII->isPredicated(*BBI1T); in IfConvertDiamondCommon()
1993 bool BB2NonPredicated = BBI2T != MBB2.end() && !TII->isPredicated(*BBI2T); in IfConvertDiamondCommon()
2084 if (TI != BBI.BB->end() && TII->isPredicated(*TI)) in IfConvertDiamond()
2142 if (I.isDebugInstr() || TII->isPredicated(I)) in PredicateBlock()
2202 if (!TII->isPredicated(I) && !MI->isDebugInstr()) { in CopyAndPredicateBlock()
2256 if (FromTI != FromMBB.end() && !TII->isPredicated(*FromTI)) in MergeBlocks()
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| D | TargetSchedule.cpp | 306 if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(*DepMI)) in computeOutputLatency()
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| D | AggressiveAntiDepBreaker.cpp | 389 if (MI.isCall() || MI.hasExtraDefRegAllocReq() || TII->isPredicated(MI) || in PrescanInstruction()
467 TII->isPredicated(MI) || MI.isInlineAsm(); in ScanInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.h | 266 bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI);
300 bool isPredicated() const;
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| D | HexagonMCChecker.cpp | 68 if (HexagonMCInstrInfo::isPredicated(MCII, MCI) && isPredicateRegister(R)) { in initReg()
425 if (std::get<2>(Producer).isPredicated() && in checkNewValues()
426 (!Consumer.isPredicated() || in checkNewValues()
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| D | HexagonMCInstrInfo.cpp | 34 bool HexagonMCInstrInfo::PredicateInfo::isPredicated() const { in isPredicated() function in HexagonMCInstrInfo::PredicateInfo
628 bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII, in isPredicated() function in HexagonMCInstrInfo
818 if (!isPredicated(MCII, MCI)) in predicateInfo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSubtargetInfo.inc | 19599 if (TII->isPredicated(*MI))
19611 if (TII->isPredicated(*MI))
19616 if (TII->isPredicated(*MI))
19645 if (TII->isPredicated(*MI))
19652 if (TII->isPredicated(*MI))
19659 if (TII->isPredicated(*MI))
19665 && (TII->isPredicated(*MI)))
19667 if (TII->isPredicated(*MI))
19674 if (TII->isPredicated(*MI))
19730 if (TII->isPredicated(*MI))
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 180 bool isPredicated(const MachineInstr &MI) const override;
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| D | R600Packetizer.cpp | 84 if (TII->isPredicated(*BI)) in getPreviousVector()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | VectorUtils.cpp | 926 (!isPredicated(B->getParent()) || EnablePredicatedInterleavedMemAccesses)) { in analyzeInterleaving()
1028 if ((isPredicated(BlockA) || isPredicated(BlockB)) && in analyzeInterleaving()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 326 while (isPredicated(*I) || I->isTerminator() || I->isDebugValue()) { in analyzeBranch()
358 CantAnalyze = !isPredicated(*I); in analyzeBranch()
366 if (!isPredicated(*I) && in analyzeBranch()
482 bool ARMBaseInstrInfo::isPredicated(const MachineInstr &MI) const { in isPredicated() function in ARMBaseInstrInfo
2890 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(*MI)) { in optimizeCompareInstr()
2899 isPredicated(*PotentialAND)) in optimizeCompareInstr()
3018 if (isPredicated(*MI)) in optimizeCompareInstr()
3147 assert(!isPredicated(*MI) && "Can't use flags from predicated instruction"); in optimizeCompareInstr()
3165 if (isPredicated(MI)) in shouldSink()
4839 if (MI.getOpcode() == ARM::VMOVD && !isPredicated(MI)) in getExecutionDomain()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 172 return !isPredicated(MI); in isUnpredicatedTerminator()
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| /third_party/skia/third_party/externals/swiftshader/src/Shader/ |
| D | Shader.hpp | 516 bool isPredicated() const;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 336 bool isPredicated(const MachineInstr &MI) const override;
|