| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 402 bool isSub = Opc == sub; variable
403 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
433 bool isSub = Opc == sub; variable
434 return ((int)isSub << 8) | Offset | (IdxMode << 9);
476 bool isSub = Opc == sub; in getAM5Opc() local
477 return ((int)isSub << 8) | Offset; in getAM5Opc()
497 bool isSub = Opc == sub; in getAM5FP16Opc() local
498 return ((int)isSub << 8) | Offset; in getAM5FP16Opc()
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| D | ARMInstPrinter.cpp | 363 bool isSub = OffImm < 0; in printThumbLdrLabelOperand() local
368 if (isSub) { in printThumbLdrLabelOperand()
1191 bool isSub = OffImm < 0; in printAddrModeImm12Operand() local
1195 if (isSub) { in printAddrModeImm12Operand()
1215 bool isSub = OffImm < 0; in printT2AddrModeImm8Operand() local
1219 if (isSub) { in printT2AddrModeImm8Operand()
1244 bool isSub = OffImm < 0; in printT2AddrModeImm8s4Operand() local
1251 if (isSub) { in printT2AddrModeImm8s4Operand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 244 bool isSub = NumBytes < 0; in emitT2RegPlusImmediate() local
245 if (isSub) NumBytes = -NumBytes; in emitT2RegPlusImmediate()
269 if (isSub) { in emitT2RegPlusImmediate()
312 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitT2RegPlusImmediate()
327 Opc = isSub ? t2SUB : t2ADD; in emitT2RegPlusImmediate()
334 Opc = isSub ? t2SUBi12 : t2ADDi12; in emitT2RegPlusImmediate()
480 bool isSub = false; in rewriteT2FrameIndex() local
512 isSub = true; in rewriteT2FrameIndex()
531 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex()
588 isSub = true; in rewriteT2FrameIndex()
[all …]
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| D | ThumbRegisterInfo.cpp | 133 bool isSub = false; in emitThumbRegPlusImmInReg() local
139 isSub = true; in emitThumbRegPlusImmInReg()
170 int Opc = (isSub) ? ARM::tSUBrr in emitThumbRegPlusImmInReg()
175 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmInReg()
193 bool isSub = NumBytes < 0; in emitThumbRegPlusImmediate() local
195 if (isSub) Bytes = -NumBytes; in emitThumbRegPlusImmediate()
228 ExtraOpc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate()
234 assert(!isSub && "Thumb1 does not have tSUBrSPi"); in emitThumbRegPlusImmediate()
243 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3; in emitThumbRegPlusImmediate()
251 ExtraOpc = isSub ? ARM::tSUBi8 : ARM::tADDi8; in emitThumbRegPlusImmediate()
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| D | ARMBaseInstrInfo.cpp | 183 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
191 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
200 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg) in convertToThreeAddress()
209 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
217 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
222 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
229 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
583 bool isSub = ARM_AM::getAM3Op(OpcImm) == ARM_AM::sub; in isAddrMode3OpMinusReg() local
584 return (isSub && Offset.getReg() != 0); in isAddrMode3OpMinusReg()
2370 bool isSub = NumBytes < 0; in emitARMRegPlusImmediate() local
[all …]
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| D | ARMISelLowering.cpp | 10585 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter() local
10587 if (isSub) in EmitInstrWithCustomInserter()
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| /third_party/node/deps/npm/node_modules/minimatch/ |
| D | minimatch.js | 271 function parse (pattern, isSub) { argument
590 if (nlAfter === '' && isSub !== SUBPARSE) {
609 if (isSub === SUBPARSE) {
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 253 bool isSub = NumBytes < 0; in emitSPUpdate() local
254 uint64_t Offset = isSub ? -NumBytes : NumBytes; in emitSPUpdate()
256 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy; in emitSPUpdate()
266 if (isSub && !isEAXLiveIn(MBB)) in emitSPUpdate()
273 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit); in emitSPUpdate()
297 if (isSub) in emitSPUpdate()
324 unsigned Reg = isSub in emitSPUpdate()
328 unsigned Opc = isSub in emitSPUpdate()
332 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
339 BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue) in emitSPUpdate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 87 bool isSub = Val < 0; in adjustReg() local
88 if (isSub) { in adjustReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrFormats.td | 1848 class BaseBaseAddSubCarry<bit isSub, RegisterClass regtype, string asm,
1857 let Inst{30} = isSub;
1865 class BaseAddSubCarry<bit isSub, RegisterClass regtype, string asm,
1867 : BaseBaseAddSubCarry<isSub, regtype, asm,
1870 class BaseAddSubCarrySetFlags<bit isSub, RegisterClass regtype, string asm,
1872 : BaseBaseAddSubCarry<isSub, regtype, asm,
1878 multiclass AddSubCarry<bit isSub, string asm, string asm_setflags,
1880 def Wr : BaseAddSubCarry<isSub, GPR32, asm, OpNode> {
1884 def Xr : BaseAddSubCarry<isSub, GPR64, asm, OpNode> {
1890 def SWr : BaseAddSubCarrySetFlags<isSub, GPR32, asm_setflags,
[all …]
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| /third_party/node/tools/ |
| D | lint-md.mjs | 18759 const isSub = simpleSubset(simpleSub, simpleDom, options); constant
18760 sawNonNull = sawNonNull || isSub !== null;
18761 if (isSub)
23836 function parse$3 (pattern, isSub) { argument
24155 if (nlAfter === '' && isSub !== SUBPARSE) {
24174 if (isSub === SUBPARSE) {
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