Searched refs:is_3src (Results 1 – 11 of 11) sorted by relevance
| /third_party/mesa3d/src/intel/compiler/ |
| D | test_eu_compact.cpp | 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits()
121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit()
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| D | brw_ir.h | 93 bool is_3src(const struct intel_device_info *devinfo) const;
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| D | brw_fs_bank_conflicts.cpp | 648 } else if (inst->is_3src(v->devinfo) && in shader_conflict_weight_matrix()
947 return inst->is_3src(devinfo) && in has_bank_conflict()
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| D | brw_shader.cpp | 888 backend_instruction::is_3src(const struct intel_device_info *devinfo) const in is_3src() function in backend_instruction
890 return ::is_3src(devinfo, opcode); in is_3src()
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| D | brw_vec4_copy_propagation.cpp | 383 if (inst->is_3src(devinfo) && in try_copy_propagate()
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| D | brw_eu_compact.c | 1799 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in try_compact_instruction()
2210 is_3src(devinfo, brw_opcode_decode( in uncompact_instruction()
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| D | brw_fs_copy_propagation.cpp | 398 if (inst->is_3src(devinfo)) { in can_take_stride()
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| D | brw_vec4.cpp | 2049 if (inst->is_3src(devinfo) && inst->dst.is_null()) { in fixup_3src_null_dest()
2142 if (inst->is_3src(devinfo)) { in convert_to_hw_regs()
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| D | brw_eu.h | 1925 is_3src(const struct intel_device_info *devinfo, enum opcode opcode) in is_3src() function
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| D | brw_fs.cpp | 7164 if (inst->conditional_mod && (devinfo->ver < 8 || inst->is_3src(devinfo))) in get_fpu_lowered_simd_width()
7172 if (inst->is_3src(devinfo) && !devinfo->supports_simd16_3src) in get_fpu_lowered_simd_width()
8693 if (inst->is_3src(devinfo) && inst->dst.is_null()) { in fixup_3src_null_dest()
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| D | brw_eu_emit.c | 628 if (is_3src(devinfo, brw_inst_opcode(devinfo, insn)) && in brw_inst_set_state()
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