| /third_party/mesa3d/src/broadcom/common/ |
| D | v3d_tiling.c | 224 bool is_load) in v3d_move_pixels_unaligned() argument
240 if (is_load) { in v3d_move_pixels_unaligned()
264 bool is_load) in v3d_move_pixels_general_percpp() argument
287 if (is_load) { in v3d_move_pixels_general_percpp()
306 get_pixel_offset, is_load); in v3d_move_pixels_general_percpp()
350 get_pixel_offset, is_load); in v3d_move_pixels_general_percpp()
362 bool is_load) in v3d_move_pixels_general() argument
370 is_load); in v3d_move_pixels_general()
377 is_load); in v3d_move_pixels_general()
384 is_load); in v3d_move_pixels_general()
[all …]
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| /third_party/mindspore/mindspore/ccsrc/pipeline/jit/ |
| D | resource.h | 83 bool is_load() { return is_load_; } in is_load() function
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| D | action.cc | 205 if (res->is_load()) { in AbstractAnalyze()
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| /third_party/mesa3d/src/panfrost/util/ |
| D | pan_lower_framebuffer.c | 609 bool is_load = intr->intrinsic == nir_intrinsic_load_deref; in pan_lower_framebuffer() local
612 if (!(is_load || (is_store && is_blend))) in pan_lower_framebuffer()
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| /third_party/mindspore/mindspore/core/ir/ |
| D | anf.h | 295 void set_load_flag(bool is_load) { is_load_ = is_load; } in set_load_flag() argument
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_assembler.cpp | 183 bool is_load = !instr->definitions.empty(); in emit_instruction() local
230 if (is_load || instr->operands.size() >= 3) { /* SDATA */ in emit_instruction()
231 encoding |= (is_load ? instr->definitions[0].physReg() : instr->operands[2].physReg()) in emit_instruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 2405 bool Address::CanHoldImmediateOffset(bool is_load, intptr_t cid, in CanHoldImmediateOffset() argument
2408 if (is_load) { in CanHoldImmediateOffset()
3368 Address Assembler::ElementAddressForIntIndex(bool is_load, bool is_external, in ElementAddressForIntIndex() argument
3378 if (Address::CanHoldImmediateOffset(is_load, cid, offset)) { in ElementAddressForIntIndex()
3381 ASSERT(Address::CanHoldImmediateOffset(is_load, cid, offset - offset_base)); in ElementAddressForIntIndex()
3387 Address Assembler::ElementAddressForRegIndex(bool is_load, bool is_external, in ElementAddressForRegIndex() argument
3397 const Register base = is_load ? IP : index; in ElementAddressForRegIndex()
3415 if ((is_load && !Address::CanHoldLoadOffset(size, offset, &offset_mask)) || in ElementAddressForRegIndex()
3416 (!is_load && !Address::CanHoldStoreOffset(size, offset, &offset_mask))) { in ElementAddressForRegIndex()
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| D | assembler_arm.h | 319 static bool CanHoldImmediateOffset(bool is_load, intptr_t cid,
1094 Address ElementAddressForIntIndex(bool is_load, bool is_external,
1099 Address ElementAddressForRegIndex(bool is_load, bool is_external,
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 507 bool is_load = (instr->intrinsic == nir_intrinsic_load_uniform || in ntq_emit_tmu_general() local
513 if (!is_load) in ntq_emit_tmu_general()
597 } else if (!is_load && !atomic_add_replaced) { in ntq_emit_tmu_general()
611 if (is_load || atomic_add_replaced) { in ntq_emit_tmu_general()
618 v3d_tmu_get_type_from_op(tmu_op, !is_load) == in ntq_emit_tmu_general()
622 is_load && !vir_in_nonuniform_control_flow(c) in ntq_emit_tmu_general()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_legalize.c | 266 } else if (is_load(n)) { in legalize_block()
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| D | ir3.h | 934 is_load(struct ir3_instruction *instr) in is_load() function
1682 if (is_load(instr)) { in ir3_has_latency_to_hide()
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| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 1406 bool is_load = (instr->intrinsic == nir_intrinsic_atomic_counter_read || in ntt_emit_mem() local
1460 if (!is_load) in ntt_emit_mem()
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