Searched refs:lane2 (Results 1 – 3 of 3) sorted by relevance
| /third_party/mesa3d/src/amd/llvm/ |
| D | ac_llvm_build.h | 550 unsigned lane1, unsigned lane2, unsigned lane3);
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| D | ac_llvm_build.c | 3499 static inline enum dpp_ctrl dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, in dpp_quad_perm() argument
3502 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4); in dpp_quad_perm()
3503 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6); in dpp_quad_perm()
4345 unsigned lane1, unsigned lane2, unsigned lane3) in ac_build_quad_swizzle() argument
4347 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3); in ac_build_quad_swizzle()
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| D | bifrost_compile.c | 2046 bi_index lane2 = bi_iadd_u32(b, lane1, in bi_emit_alu() local
2054 right = bi_clper_v6_i32(b, s0, lane2); in bi_emit_alu()
2060 right = bi_clper_i32(b, s0, lane2, in bi_emit_alu()
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