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Searched refs:ldunif (Results 1 – 16 of 16) sorted by relevance

/third_party/mesa3d/src/broadcom/compiler/
Dqpu_validate.c123 (inst->sig.ldunif || inst->sig.ldunifa)) { in qpu_validate_inst()
135 bool last_reads_ldunif = (state->last && (state->last->sig.ldunif || in qpu_validate_inst()
139 bool reads_ldunif = inst->sig.ldunif || inst->sig.ldunifrf; in qpu_validate_inst()
Dvir_to_qpu.c274 if (qinst->qpu.sig.ldunif || qinst->qpu.sig.ldunifa) { in v3d_generate_code_block()
282 if (qinst->qpu.sig.ldunif) { in v3d_generate_code_block()
283 qinst->qpu.sig.ldunif = false; in v3d_generate_code_block()
343 if (qpu.sig.ldunif || in reads_uniform()
Dvir_opt_small_immediates.c63 if (!src_def || !src_def->qpu.sig.ldunif) in vir_opt_small_immediates()
Dvir_opt_constant_alu.c136 if ((def->qpu.sig.ldunif || def->qpu.sig.ldunifrf) && in try_opt_constant_alu()
Dvir_register_allocate.c79 return def && def->qpu.sig.ldunif; in vir_is_mov_uniform()
737 if (!inst->qpu.sig.ldunif) { in v3d_register_allocate()
Dqpu_schedule.c977 merge.sig.ldunif |= b->sig.ldunif; in qpu_merge_inst()
1010 return inst->sig.ldunif || inst->sig.ldunifrf; in try_skip_for_ldvary_pipelining()
1086 if ((inst->sig.ldunif || inst->sig.ldunifa) && in choose_instruction_to_schedule()
2012 if (inst->sig.ldunif) in fixup_pipelined_ldvary()
Dvir_dump.c240 if (sig->ldunif) in vir_dump_sig()
Dvir.c1893 if ((inst->qpu.sig.ldunif || inst->qpu.sig.ldunifrf) && in try_opt_ldunif()
1938 inst->qpu.sig.ldunif = true; in vir_uniform()
Dnir_to_vir.c687 return (sig->ldunif || in is_ld_signal()
701 return sig->ldunif || sig->ldunifrf; in is_ldunif_signal()
/third_party/mesa3d/src/broadcom/qpu/
Dqpu_disasm.c212 !sig->ldunif && in v3d_qpu_disasm_sig()
242 if (sig->ldunif) in v3d_qpu_disasm_sig()
Dqpu_instr.h44 bool ldunif:1; member
Dqpu_instr.c868 return inst->sig.ldvary || inst->sig.ldunif || inst->sig.ldunifa; in v3d_qpu_writes_r5()
Dqpu_pack.c108 #define LDUNIF .ldunif = true
/third_party/mesa3d/docs/relnotes/
D21.3.1.rst65 - broadcom/compiler: don't move ldvary earlier if current instruction has ldunif
D19.1.0.rst1412 - v3d: Add support for vir-to-qpu of ldunif instructions to a temp.
1414 - v3d: Add support for register-allocating a ldunif to a QFILE_TEMP.
1415 - v3d: Use ldunif instructions for uniforms.
D21.1.0.rst2315 - broadcom/compiler: don't emit redundant ldunif
2318 - broadcom/compiler: fix ldunif optimization
2339 - broadcom/compiler: disallow ldunif during ldvary sequences if possible