Searched refs:lower_flrp16 (Results 1 – 20 of 20) sorted by relevance
| /third_party/mesa3d/src/panfrost/midgard/ |
| D | midgard_compile.h | 47 .lower_flrp16 = true,
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| D | midgard_compile.c | 298 (nir->options->lower_flrp16 ? 16 : 0) | in optimise_nir()
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| D | bifrost_compile.h | 39 .lower_flrp16 = true,
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| /third_party/mesa3d/src/asahi/compiler/ |
| D | agx_compile.h | 193 .lower_flrp16 = true,
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir.c | 37 .lower_flrp16 = true,
93 .lower_flrp16 = true,
199 unsigned lower_flrp = (s->options->lower_flrp16 ? 16 : 0) | in ir3_optimize_loop()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_compiler.c | 35 .lower_flrp16 = true, \
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| D | brw_nir.c | 529 (nir->options->lower_flrp16 ? 16 : 0) | in brw_nir_optimize()
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| /third_party/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_screen.c | 575 .lower_flrp16 = true,
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_get.c | 996 .lower_flrp16 = true, in si_init_screen_get_functions()
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| D | si_shader_nir.c | 600 unsigned lower_flrp = (nir->options->lower_flrp16 ? 16 : 0) | in si_nir_opts()
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| /third_party/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_nir.cpp | 305 (nir->options->lower_flrp16 ? 16 : 0) | in st_nir_opts()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_shader.c | 58 .lower_flrp16 = true, in radv_get_nir_options()
695 unsigned lower_flrp = (nir->options->lower_flrp16 ? 16 : 0) | in radv_shader_compile_to_nir()
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_loop_analyze.c | 157 if ((options->lower_flrp16 && nir_dest_bit_size(alu->dest.dest) == 16) || in instr_cost()
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| D | nir.h | 3442 bool lower_flrp16; member
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| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_program.c | 1515 (s->options->lower_flrp16 ? 16 : 0) | in vc4_optimize_nir()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 1839 (s->options->lower_flrp16 ? 16 : 0) | in v3d_optimize_nir()
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| /third_party/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_nir.cpp | 3228 op.lower_flrp16 = (chipset >= NVISA_GV100_CHIPSET); in nvir_nir_shader_compiler_options()
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| /third_party/mesa3d/src/microsoft/compiler/ |
| D | nir_to_dxil.c | 87 .lower_flrp16 = true,
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| /third_party/mesa3d/docs/relnotes/ |
| D | 20.1.0.rst | 772 - pan/mdg: Set lower_flrp16
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| D | 21.3.0.rst | 1174 - llvmpipe: lower_flrp16
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