| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_shader.c | 87 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint()
90 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint()
104 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint()
107 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint()
118 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint()
121 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint()
734 so->info.max_half_reg + 1, so->info.max_reg + 1, so->constlen); in ir3_shader_disasm()
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| D | ir3.c | 103 info->max_reg = MAX2(info->max_reg, max >> 3); in collect_reg_info()
108 info->max_reg = MAX2(info->max_reg, max >> 2); in collect_reg_info()
228 info->max_reg = -1; in ir3_collect_info()
323 info->max_reg + 1 + in ir3_collect_info()
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| D | ir3_shader.h | 1005 return (2 * (v->info.max_reg + 1)) + (v->info.max_half_reg + 1); in ir3_shader_halfregs()
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| D | ir3.h | 66 int8_t max_reg; /* highest GPR # used by shader */ member
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_fs_bank_conflicts.cpp | 367 max_reg(n), in partitioning()
378 max_reg(p.max_reg), in partitioning()
380 atoms(new unsigned[p.max_reg + num_terminator_atoms]) in partitioning()
385 sizeof(unsigned) * (p.max_reg + num_terminator_atoms)); in partitioning()
397 SWAP(max_reg, p.max_reg); in operator =()
416 for (unsigned reg1 = reg + 1; reg1 <= max_reg; reg1++) { in require_contiguous()
463 return atoms[max_reg]; in num_atoms()
473 unsigned max_reg; member
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_program.c | 253 fs_gprs = (fpi->max_reg < 0) ? 0x80 : fpi->max_reg; in fd2_program_emit()
257 vs_gprs = (vpi->max_reg < 0) ? 0x80 : vpi->max_reg; in fd2_program_emit()
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| D | ir2_ra.c | 172 ctx->info->max_reg = MAX2(ctx->info->max_reg, (int)idx); in ra_reg()
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| D | ir2.h | 57 int8_t max_reg; member
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| D | ir2.c | 453 ctx.info->max_reg = -1; in ir2_compile()
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| /third_party/libunwind/src/ia64/ |
| D | Gscript.c | 372 int r, i, j, max, max_reg, max_when, num_regs = 0; in sort_regs() local
391 max_reg = regorder[max]; in sort_regs()
392 max_when = sr->curr.reg[max_reg].when; in sort_regs()
398 max_reg = regorder[j]; in sort_regs()
399 max_when = sr->curr.reg[max_reg].when; in sort_regs()
404 regorder[i] = max_reg; in sort_regs()
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| /third_party/mesa3d/src/asahi/compiler/ |
| D | agx_register_allocate.c | 94 agx_ra_assign_local(agx_block *block, uint8_t *ssa_to_reg, uint8_t *ncomps, unsigned max_reg) in agx_ra_assign_local() argument
126 unsigned reg = agx_assign_regs(used_regs, count, align, max_reg); in agx_ra_assign_local()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 9.2.4.rst | 66 - freedreno/a3xx/compiler: use max_reg rather than file_count
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_program.c | 238 A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(vsi->max_reg + 1) | in fd3_program_emit()
309 A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(fsi->max_reg + 1) | in fd3_program_emit()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_compute.c | 61 A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1) | in cs_program_emit()
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| D | fd5_program.c | 380 A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) | in fd5_program_emit()
532 A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) | in fd5_program_emit()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_program.c | 523 A6XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(vs->info.max_reg + 1) | in setup_stateobj()
650 A6XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(hs->info.max_reg + 1) | in setup_stateobj()
661 A6XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(ds->info.max_reg + 1) | in setup_stateobj()
819 A6XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(fs->info.max_reg + 1) | in setup_stateobj()
918 A6XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(gs->info.max_reg + 1) | in setup_stateobj()
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| D | fd6_compute.c | 68 A6XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1) | in cs_program_emit()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_program.c | 291 A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) | in fd4_program_emit()
371 A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) | in fd4_program_emit()
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| /third_party/mesa3d/src/freedreno/computerator/ |
| D | a4xx.c | 114 A4XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1)); in cs_program_emit()
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| D | a6xx.c | 153 A6XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1) | in cs_program_emit()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_pipeline.c | 471 .fullregfootprint = xs->info.max_reg + 1, in tu6_emit_xs()
479 .fullregfootprint = xs->info.max_reg + 1, in tu6_emit_xs()
486 .fullregfootprint = xs->info.max_reg + 1, in tu6_emit_xs()
494 .fullregfootprint = xs->info.max_reg + 1, in tu6_emit_xs()
501 .fullregfootprint = xs->info.max_reg + 1, in tu6_emit_xs()
515 .fullregfootprint = xs->info.max_reg + 1, in tu6_emit_xs()
3524 stat->value.u64 = exe->stats.max_reg + 1; in tu_GetPipelineExecutableStatisticsKHR()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_gallium.c | 92 v->info.max_half_reg + 1, v->info.max_reg + 1, v->constlen, in dump_shader_info()
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| /third_party/openh264/codec/processing/src/x86/ |
| D | vaa.asm | 176 %define max_reg %1
177 movdqa xmm1, max_reg
179 pmaxub max_reg, xmm1
180 movdqa xmm1, max_reg
182 pmaxub max_reg, xmm1
183 movdqa xmm1, max_reg
185 pmaxub max_reg, xmm1
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