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Searched refs:midgard_reg_mode_64 (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/panfrost/midgard/
Dmidgard_print_constant.c67 case midgard_reg_mode_64: in mir_print_constant_component()
Dmidgard.h257 midgard_reg_mode_64 = 3 enumerator
Ddisassemble.c383 case midgard_reg_mode_64: in bits_for_mode()
440 assert(reg_mode != midgard_reg_mode_64); in print_vec_selectors()
523 if (mode == midgard_reg_mode_64) { in print_vec_swizzle()
Dmidgard_ops.c204 #define M64 midgard_reg_mode_64
Dmidgard_emit.c248 if (reg_mode == midgard_reg_mode_64) { in mir_pack_swizzle()
Dmidgard_compile.c2609 return midgard_reg_mode_64; in reg_mode_for_bitsize()