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Searched refs:mip_levels (Results 1 – 21 of 21) sorted by relevance

/third_party/mesa3d/src/freedreno/fdl/
Dfd_layout_test.c42 int mip_levels = 1; in fdl_test_layout() local
43 while (max_size > 1 && testcase->layout.slices[mip_levels].pitch) { in fdl_test_layout()
44 mip_levels++; in fdl_test_layout()
52 MAX2(testcase->layout.depth0, 1), mip_levels, in fdl_test_layout()
59 MAX2(testcase->layout.depth0, 1), mip_levels, in fdl_test_layout()
69 for (int l = 1; l < mip_levels; l++) in fdl_test_layout()
74 for (int l = 0; l < mip_levels; l++) { in fdl_test_layout()
Dfd6_layout.c100 uint32_t depth0, uint32_t mip_levels, uint32_t array_size, in fdl6_layout() argument
171 if (mip_levels > 1) { in fdl6_layout()
186 for (uint32_t level = 0; level < mip_levels; level++) { in fdl6_layout()
212 if (level == mip_levels - 1) in fdl6_layout()
261 for (uint32_t level = 0; level < mip_levels; level++) in fdl6_layout()
Dfd5_layout.c35 uint32_t depth0, uint32_t mip_levels, uint32_t array_size, in fdl5_layout() argument
63 for (uint32_t level = 0; level < mip_levels; level++) { in fdl5_layout()
80 if (level == mip_levels - 1) in fdl5_layout()
Dfreedreno_layout.h237 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
242 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
/third_party/mesa3d/src/gallium/winsys/svga/drm/
Dvmw_screen_dri.c150 uint32_t mip_levels; in vmw_drm_gb_surface_from_handle() local
164 &mip_levels, &handle, &desc.region); in vmw_drm_gb_surface_from_handle()
173 if (mip_levels != 1) { in vmw_drm_gb_surface_from_handle()
176 whandle->handle, mip_levels); in vmw_drm_gb_surface_from_handle()
280 if (rep->mip_levels[0] != 1) { in vmw_drm_surface_from_handle()
283 handle, rep->mip_levels[0]); in vmw_drm_surface_from_handle()
288 if (rep->mip_levels[i] != 0) { in vmw_drm_surface_from_handle()
313 rep->mip_levels[0], in vmw_drm_surface_from_handle()
Dvmwgfx_drm.h201 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; member
932 __u32 mip_levels; member
Dvmw_screen_ioctl.c170 req->mip_levels[iFace] = numMipLevels; in vmw_ioctl_surface_create()
182 req->mip_levels[iFace] = 0; in vmw_ioctl_surface_create()
257 req->base.mip_levels = numMipLevels; in vmw_ioctl_gb_surface_create()
296 req->mip_levels = numMipLevels; in vmw_ioctl_gb_surface_create()
451 *numMipLevels = rep->creq.base.mip_levels; in vmw_ioctl_gb_surface_ref()
478 *numMipLevels = rep->creq.mip_levels; in vmw_ioctl_gb_surface_ref()
/third_party/mesa3d/src/vulkan/util/
Dvk_image.h41 uint32_t mip_levels; member
125 image->mip_levels - range->baseMipLevel : range->levelCount; in vk_image_subresource_level_count()
Dvk_image.c80 image->mip_levels = pCreateInfo->mipLevels; in vk_image_init()
384 assert(range->baseMipLevel < image->mip_levels); in vk_image_view_init()
395 <= image->mip_levels); in vk_image_view_init()
/third_party/libdrm/include/drm/
Dvmwgfx_drm.h185 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; member
931 __u32 mip_levels; member
/third_party/mesa3d/src/gallium/drivers/d3d12/
Dd3d12_resource.h44 unsigned mip_levels; member
Dd3d12_context.cpp806 sampler_view->mip_levels = state->u.tex.last_level - state->u.tex.first_level + 1; in d3d12_create_sampler_view()
850 desc.Texture1D.MipLevels = sampler_view->mip_levels; in d3d12_create_sampler_view()
855 desc.Texture1DArray.MipLevels = sampler_view->mip_levels; in d3d12_create_sampler_view()
866 desc.Texture2D.MipLevels = sampler_view->mip_levels; in d3d12_create_sampler_view()
877 desc.Texture2DArray.MipLevels = sampler_view->mip_levels; in d3d12_create_sampler_view()
893 desc.Texture3D.MipLevels = sampler_view->mip_levels; in d3d12_create_sampler_view()
902 desc.TextureCube.MipLevels = sampler_view->mip_levels; in d3d12_create_sampler_view()
1637 …uint32_t subres_id = level + (layer * res->mip_levels) + plane * (res->mip_levels * res->base.arra… in d3d12_transition_subresources_state()
Dd3d12_context.h114 unsigned mip_levels; member
Dd3d12_draw.cpp117 view->base.u.tex.first_level, view->mip_levels, in fill_srv_descriptors()
Dd3d12_resource.cpp157 res->mip_levels = templ->last_level + 1; in init_texture()
/third_party/mesa3d/src/broadcom/vulkan/
Dv3dv_image.c108 assert(image->vk.mip_levels >= 1); in v3d_setup_slices()
111 for (int32_t i = image->vk.mip_levels - 1; i >= 0; i--) { in v3d_setup_slices()
218 for (int i = 0; i < image->vk.mip_levels; i++) in v3d_setup_slices()
Dv3dv_meta_copy.c606 .mipLevels = image->vk.mip_levels, in copy_image_to_buffer_blit()
966 .mipLevels = src->vk.mip_levels, in create_image_alias()
/third_party/mesa3d/src/intel/vulkan/
Danv_image.c474 for (uint32_t l = 0; l < image->vk.mip_levels; l++) in add_aux_state_tracking_buffer()
477 state_size += image->vk.mip_levels * image->vk.array_layers * 4; in add_aux_state_tracking_buffer()
543 if (image->vk.mip_levels > 1) { in add_aux_surface_if_supported()
639 (image->vk.array_layers > 1 || image->vk.mip_levels)) { in add_aux_surface_if_supported()
743 .levels = image->vk.mip_levels, in add_shadow_surface()
787 .levels = image->vk.mip_levels, in add_primary_surface()
979 assert(image->vk.mip_levels == 1); in check_drm_format_mod()
Danv_private.h4053 return image->vk.mip_levels; in anv_image_aux_levels()
4065 assert(miplevel < image->vk.mip_levels); in anv_image_aux_layers()
DgenX_cmd_buffer.c1181 assert(last_level_num <= image->vk.mip_levels); in transition_color_buffer()
/third_party/skia/third_party/externals/spirv-cross/
Dspirv_msl.cpp8024 MSL_ImgQry(mip_levels); in emit_instruction()