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Searched refs:movw (Results 1 – 25 of 32) sorted by relevance

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/third_party/libunwind/src/x86/
Dgetcontext-freebsd.S50 movw %fs, %cx
52 movw %gs, %cx
54 movw %ds, %cx
56 movw %es, %cx
58 movw %ss, %cx
60 movw %cs, %cx
Dgetcontext-linux.S60 movw %fs, %cx
/third_party/libunwind/src/x86_64/
Dgetcontext.S80 movw %cs, UC_MCONTEXT_CS(%rdi)
81 movw %ss, UC_MCONTEXT_SS(%rdi)
85 movw %ds, UC_MCONTEXT_DS(%rdi)
86 movw %es, UC_MCONTEXT_ES(%rdi)
87 movw %fs, UC_MCONTEXT_FS(%rdi)
88 movw %gs, UC_MCONTEXT_GS(%rdi)
/third_party/ffmpeg/libavcodec/arm/
Dvc1dsp_neon.S89 movw r12, #17
93 movw r12, #10
136 movw r12, #12
147 movw r12, #15
253 movw r12, #15
277 movw r12, #16
Dvp9itxfm_16bpp_neon.S766 movw r8, #0x03ff
772 movw r8, #0x0fff
1251 movw r9, #0x03ff
1257 movw r9, #0x0fff
1873 movw r9, #0x03ff
1879 movw r9, #0x0fff
Dfft_neon.S55 movw r2, #0x04f3 @ sqrt(1/2)
Dvp8dsp_armv6.S200 movw r3, #20091 @ cospi8sqrt2minus1
201 movw r4, #35468 @ sinpi8sqrt2
Dh264qpel_neon.S27 movw \r, #5
/third_party/libffi/src/vax/
Delfbsd.S117 movw %r0, 0(%r2)
161 movw 0(%sp), %r0
/third_party/musl/src/thread/i386/
D__set_thread_area.s24 3: movw %dx,%gs
/third_party/ffmpeg/libavutil/arm/
Dasm.S140 .macro movw rd, val macro
148 movw \rd, #(\val) & 0xffff
197 movw \rd, #:lower16:\val
/third_party/libffi/src/x86/
Dwin64.S151 movw %ax, (%r8)
Dwin64_intel.S152 mov word ptr [r8], ax ; movw %ax, (%r8)
Dsysv.S193 movw %ax, (%ecx)
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.cc322 void Assembler::movw(Register rd, uint16_t imm16, Condition cond) {
2001 static int32_t DecodeARMv7LoadImmediate(int32_t movt, int32_t movw) { in DecodeARMv7LoadImmediate() argument
2005 offset |= (movw & 0xf0000) >> 4; in DecodeARMv7LoadImmediate()
2006 offset |= movw & 0xfff; in DecodeARMv7LoadImmediate()
2072 const int32_t movw = region.Load<int32_t>(position); in ProcessARMv7() local
2077 ((movw & 0xfff0f000) == 0xe300c000)) { // movw IP, low in ProcessARMv7()
2078 const int32_t offset = DecodeARMv7LoadImmediate(movt, movw); in ProcessARMv7()
2224 const int32_t movw =
2242 label->position_ = DecodeARMv7LoadImmediate(movt, movw);
2247 const int32_t movw =
[all …]
Dassembler_arm.h1142 void movw(Register rd, uint16_t imm16, Condition cond = AL);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DREADME.txt655 When loading immediate constants with movt/movw, if there are multiple
657 the same time, it would be possible to use a single movw instruction, followed
670 movw r0, #32796
674 movw r0, #32796 @ <= this MOVW is not needed, value is there already
DARM.td403 "Don't use movt/movw pairs for "
DARMInstrThumb2.td2101 "movw", "\t$Rd, $imm",
2350 // Do the same for v8m targets since they support movw with a 16-bit value.
4104 // 32-bit immediate using movw + movt.
4112 // Pseudo instruction that combines movw + movt + add pc (if pic).
/third_party/python/Modules/_ctypes/libffi_osx/x86/
Dx86-darwin.S149 movw %ax,0(%ecx)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DREADME.txt121 movw $257, 8(%edx)
128 movw al, 8(%edx)
588 movw $0, -98(%ebp)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRDevices.td66 def FeatureMOVW : SubtargetFeature<"movw", "m_hasMOVW", "true",
DAVRInstrInfo.td1099 "movw\t$dst, $src",
1884 // This pseudo gets expanded into a movw+adiw thus it clobbers SREG.
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.h238 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
/third_party/mesa3d/src/mesa/x86/
Dassyntax.h529 #define MOV_SR(a, b) CHOICE(movw ARG2(a,b), mov ARG2(a,b), mov ARG2(b,a))
531 #define MOV_W(a, b) CHOICE(movw ARG2(a,b), movw ARG2(a,b), _WTOG mov ARG2(b,a))

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