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Searched refs:nir_address_format_vec2_index_32bit_offset (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/freedreno/vulkan/
Dtu_shader.c41 .ubo_addr_format = nir_address_format_vec2_index_32bit_offset, in tu_spirv_to_nir()
42 .ssbo_addr_format = nir_address_format_vec2_index_32bit_offset, in tu_spirv_to_nir()
750 nir_address_format_vec2_index_32bit_offset); in tu_shader_create()
/third_party/mesa3d/src/compiler/nir/
Dnir_lower_io.c813 case nir_address_format_vec2_index_32bit_offset: in build_addr_iadd()
973 case nir_address_format_vec2_index_32bit_offset: in addr_to_index()
990 case nir_address_format_vec2_index_32bit_offset: in addr_to_offset()
1047 case nir_address_format_vec2_index_32bit_offset: in addr_to_global()
1129 case nir_address_format_vec2_index_32bit_offset: in nir_get_explicit_deref_range()
2549 [nir_address_format_vec2_index_32bit_offset] = {{.u32 = ~0}, {.u32 = ~0}, {.u32 = ~0}}, in nir_address_format_null_value()
2569 case nir_address_format_vec2_index_32bit_offset: in nir_build_addr_ieq()
2623 case nir_address_format_vec2_index_32bit_offset: in nir_build_addr_isub()
Dnir.h4828 nir_address_format_vec2_index_32bit_offset, enumerator
4880 case nir_address_format_vec2_index_32bit_offset: return 32; in nir_address_format_bit_size()
4899 case nir_address_format_vec2_index_32bit_offset: return 3; in nir_address_format_num_components()
/third_party/mesa3d/src/amd/vulkan/
Dradv_shader.c518 .ubo_addr_format = nir_address_format_vec2_index_32bit_offset, in radv_shader_compile_to_nir()
519 .ssbo_addr_format = nir_address_format_vec2_index_32bit_offset, in radv_shader_compile_to_nir()
712 nir_address_format_vec2_index_32bit_offset); in radv_shader_compile_to_nir()
/third_party/mesa3d/docs/relnotes/
D21.2.0.rst4411 - radv,aco: use nir_address_format_vec2_index_32bit_offset