| /third_party/mesa3d/src/amd/common/ |
| D | ac_nir_lower_tess_io_to_mem.c | 219 nir_ssa_def *base_off_var = nir_imul_imm(b, vertex_idx, st->tcs_num_reserved_inputs * 16u); in lower_ls_output_store()
275 nir_ssa_def *tcs_in_patch_stride = nir_imul_imm(b, tcs_in_vtxcnt, tcs_in_vertex_stride); in hs_per_vertex_input_lds_offset()
279 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, tcs_in_vertex_stride); in hs_per_vertex_input_lds_offset()
301 … nir_ssa_def *input_patch_size = nir_imul_imm(b, tcs_in_vtxcnt, st->tcs_num_reserved_inputs * 16u); in hs_output_lds_offset()
309 nir_ssa_def *patch_offset = nir_imul_imm(b, rel_patch_id, output_patch_stride); in hs_output_lds_offset()
314 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, output_vertex_size); in hs_output_lds_offset()
334 …nir_ssa_def *attr_stride = nir_imul(b, tcs_num_patches, nir_imul_imm(b, out_vertices_per_patch, 16… in hs_per_vertex_output_vmem_offset()
338 …nir_ssa_def *patch_offset = nir_imul(b, rel_patch_id, nir_imul_imm(b, out_vertices_per_patch, 16u)… in hs_per_vertex_output_vmem_offset()
341 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, 16u); in hs_per_vertex_output_vmem_offset()
357 …nir_ssa_def *per_vertex_output_patch_size = nir_imul_imm(b, out_vertices_per_patch, st->tcs_num_re… in hs_per_patch_output_vmem_offset()
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| D | ac_nir_lower_esgs_io_to_mem.c | 141 nir_ssa_def *off = nir_iadd(b, nir_imul_imm(b, vertex_idx, esgs_itemsize), io_off); in lower_es_output_store()
203 return nir_imul_imm(b, off, 4u); in gs_per_vertex_input_offset()
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| D | ac_nir_lower_ngg.c | 164 nir_ssa_def *shift = nir_iadd_imm_nuw(b, nir_imul_imm(b, lane_id, -4u), num_lds_dwords * 16); in summarize_repack()
293 return nir_imul_imm(b, vertex_idx, per_vtx_bytes); in pervertex_lds_addr()
1434 nir_ssa_def *out_vtx_offs = nir_imul_imm(b, out_vtx_idx, s->lds_bytes_per_gs_out_vertex); in ngg_gs_out_vertex_addr()
1442 nir_ssa_def *gs_out_vtx_base = nir_imul_imm(b, tid_in_tg, b->shader->info.gs.vertices_out); in ngg_gs_emit_vertex_addr()
1487 num_prims_in_wave = nir_imul_imm(b, num_threads, total_prm_cnt); in ngg_gs_shader_query()
1492 …prm_cnt = nir_iadd_nuw(b, nir_imul_imm(b, prm_cnt, -1u * (s->num_vertices_per_primitive - 1)), gs_… in ngg_gs_shader_query()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_nir_lower_alpha_to_coverage.c | 75 return nir_ior(b, nir_imul_imm(b, part_a, 0x1111), in build_dither_mask()
76 nir_ior(b, nir_imul_imm(b, part_b, 0x0808), in build_dither_mask()
77 nir_imul_imm(b, part_c, 0x0100))); in build_dither_mask()
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| D | brw_nir_rt_builder.h | 92 return nir_imul_imm(b, nir_load_ray_num_dss_rt_stacks_intel(b), in brw_nir_num_rt_stacks()
109 nir_imul_imm(b, brw_nir_rt_stack_id(b), BRW_RT_SIZEOF_HOTZONE); in brw_nir_rt_sw_hotzone_addr()
112 nir_imul_imm(b, brw_nir_num_rt_stacks(b, devinfo), in brw_nir_rt_sw_hotzone_addr()
256 nir_ssa_def *ptr64 = nir_imul_imm(b, nir_pack_64_2x32(b, vec2), 64); in brw_nir_rt_unpack_leaf_ptr()
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| D | brw_nir_lower_rt_intrinsics.c | 304 sysval = nir_imul_imm(b, globals.hw_stack_size, 64); in lower_rt_intrinsics_impl()
308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64); in lower_rt_intrinsics_impl()
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| D | brw_nir_lower_cs_intrinsics.c | 139 nir_imul_imm(b, in lower_cs_intrinsics_convert_block()
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| /third_party/mesa3d/src/compiler/nir/tests/ |
| D | load_store_vectorizer_tests.cpp | 606 nir_ssa_def *index_base = nir_imul_imm(b, inv, 0xfffffffc); in TEST_F()
607 nir_ssa_def *index_base_prev = nir_imul_imm(b, inv_plus_one, 0xfffffffc); in TEST_F()
1589 nir_iadd_imm(b, nir_imul_imm(b, nir_iadd_imm(b, index_base, 2), 16), 32), 0x1); in TEST_F()
1591 nir_iadd_imm(b, nir_imul_imm(b, nir_iadd_imm(b, index_base, 3), 16), 32), 0x2); in TEST_F()
1605 nir_ssa_def *low = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 12); in TEST_F()
1606 nir_ssa_def *high = nir_imul_imm(b, nir_iadd_imm(b, index_base, 1), 16); in TEST_F()
1660 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 4); in TEST_F()
1686 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16); in TEST_F()
1703 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16); in TEST_F()
1836 nir_ssa_def *first = nir_imul_imm(b, index_base, 0x100000000); in TEST_F()
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| /third_party/mesa3d/src/panfrost/util/ |
| D | pan_lower_sample_position.c | 51 nir_u2u64(b, nir_imul_imm(b, nir_load_sample_id(b), 4))); in pan_lower_sample_pos_impl()
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/ |
| D | lima_nir_lower_uniform_to_scalar.c | 47 nir_src_for_ssa(nir_imul_imm(b, intr->src[0].ssa, 4)); in lower_load_uniform_to_scalar()
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| /third_party/mesa3d/src/panfrost/lib/ |
| D | pan_indirect_draw.c | 419 nir_imul_imm(b, builder->draw.vertex_start, index_size); in update_job()
595 nir_imul_imm(b, attrib_idx, in update_vertex_attribs()
599 nir_imul_imm(b, attrib_idx, in update_vertex_attribs()
848 nir_imul_imm(b, builder->draw.vertex_start, index_size)); in get_instance_size()
852 nir_imul_imm(b, builder->draw.vertex_count, index_size)); in get_instance_size()
1010 nir_imul_imm(b, builder->draw.vertex_start, index_size)); in get_index_min_max()
1015 nir_iadd(b, start, nir_imul_imm(b, builder->draw.vertex_count, index_size)); in get_index_min_max()
1024 start = nir_iadd(b, start, nir_imul_imm(b, thread_id, sizeof(uint32_t))); in get_index_min_max()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | v3d_nir_lower_scratch.c | 50 return nir_imul_imm(b, offset, V3D_CHANNELS); in v3d_nir_scratch_offset()
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_lower_uniforms_to_ubo.c | 77 nir_iadd_imm(b, nir_imul_imm(b, uniform_offset, multiplier), in lower_instr()
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| D | nir_lower_variable_initializers.c | 172 nir_ssa_def *first_offset = nir_imul_imm(&b, local_index, chunk_size); in nir_zero_initialize_shared_memory()
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| D | nir_lower_locals_to_regs.c | 172 nir_imul_imm(b, index, inner_array_size)); in get_deref_reg_src()
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| D | nir_builder.h | 886 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y) in nir_imul_imm() function
1673 nir_ssa_def *base_op = nir_imul_imm(b, base_stride, nir_intrinsic_base(intrin)); in nir_build_calc_io_offset()
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| D | nir_lower_tex.c | 1235 nir_imul_imm(b, sample.ssa, 4), nir_imm_int(b, 4)); in nir_lower_ms_txf_to_fragment_fetch()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | anv_nir_compute_push_layout.c | 171 nir_imul_imm(b, intrin->src[0].ssa, sizeof(uint64_t)), in anv_nir_compute_push_layout()
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| D | anv_nir_apply_pipeline_layout.c | 460 nir_iadd(b, desc_offset, nir_imul_imm(b, res.array_index, stride)); in build_desc_addr()
541 nir_load_push_constant(b, 1, 32, nir_imul_imm(b, dyn_offset_idx, 4), in build_buffer_addr_for_res_index()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_shader.c | 359 nir_imul_imm(b, arr_index, 2)); in build_bindless()
384 nir_imul_imm(b, arr_index, descriptor_stride)); in build_bindless()
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| /third_party/mesa3d/src/microsoft/compiler/ |
| D | dxil_nir.c | 365 nir_ssa_def *shift = nir_imul_imm(b, pos, 8); in lower_store_ssbo()
497 nir_imul_imm(b, nir_iand(b, offset, nir_imm_int(b, 3)), 8); in lower_masked_store_vec32()
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| /third_party/mesa3d/src/compiler/spirv/ |
| D | vtn_opencl.c | 639 nir_ssa_def *moffset = nir_imul_imm(&b->nb, offset, in _handle_v_load_store()
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| D | vtn_variables.c | 210 return nir_imul_imm(&b->nb, ssa, stride); in vtn_access_link_as_ssa()
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