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Searched refs:radv_buffer_get_va (Results 1 – 15 of 15) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_meta_buffer.c327 uint64_t va = radv_buffer_get_va(bo); in radv_fill_buffer()
347 uint64_t src_va = radv_buffer_get_va(src_bo); in radv_copy_buffer()
348 uint64_t dst_va = radv_buffer_get_va(dst_bo); in radv_copy_buffer()
434 uint64_t va = radv_buffer_get_va(dst_buffer->bo); in radv_CmdUpdateBuffer()
Dradv_cmd_buffer.c540 cmd_buffer->gfx9_fence_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo); in radv_reset_cmd_buffer()
549 cmd_buffer->gfx9_eop_bug_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo); in radv_reset_cmd_buffer()
662 va = radv_buffer_get_va(device->trace_bo); in radv_cmd_buffer_trace_emit()
709 va = radv_buffer_get_va(device->trace_bo); in radv_save_pipeline()
738 va = radv_buffer_get_va(device->trace_bo); in radv_save_vertex_descriptors()
768 va = radv_buffer_get_va(device->trace_bo) + 32; in radv_save_descriptors()
2878 uint64_t prolog_va = radv_buffer_get_va(prolog->bo) + prolog->alloc->offset; in emit_prolog_regs()
2958 input_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + inputs_offset; in emit_prolog_inputs()
3080 set->header.va = radv_buffer_get_va(cmd_buffer->upload.upload_bo); in radv_flush_push_descriptors()
3106 uint64_t va = radv_buffer_get_va(cmd_buffer->upload.upload_bo); in radv_flush_indirect_descriptor_sets()
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Dsi_cmd_buffer.c98 uint64_t bc_va = radv_buffer_get_va(device->border_color_data.bo); in si_emit_compute()
132 uint64_t bc_va = radv_buffer_get_va(device->border_color_data.bo); in si_emit_compute()
143 tma_va = radv_buffer_get_va(device->tma_bo); in si_emit_compute()
466 uint64_t border_color_va = radv_buffer_get_va(device->border_color_data.bo); in si_emit_graphics()
535 tma_va = radv_buffer_get_va(device->tma_bo); in si_emit_graphics()
1559 va = radv_buffer_get_va(cmd_buffer->upload.upload_bo); in si_cp_dma_realign_engine()
Dradv_query.c1219 uint64_t va = radv_buffer_get_va(pool->bo); in radv_CmdCopyQueryPoolResults()
1220 uint64_t dest_va = radv_buffer_get_va(dst_buffer->bo); in radv_CmdCopyQueryPoolResults()
1591 uint64_t va = radv_buffer_get_va(pool->bo); in radv_CmdBeginQueryIndexedEXT()
1615 uint64_t va = radv_buffer_get_va(pool->bo); in radv_CmdEndQueryIndexedEXT()
1656 uint64_t va = radv_buffer_get_va(pool->bo); in radv_CmdWriteTimestamp()
1710 uint64_t pool_va = radv_buffer_get_va(pool->bo); in radv_CmdWriteAccelerationStructuresPropertiesKHR()
Dradv_private.h2135 uint64_t va = radv_buffer_get_va(image->bo); in radv_image_get_fast_clear_va()
2145 uint64_t va = radv_buffer_get_va(image->bo); in radv_image_get_fce_pred_va()
2155 uint64_t va = radv_buffer_get_va(image->bo); in radv_image_get_dcc_pred_va()
2165 uint64_t va = radv_buffer_get_va(image->bo); in radv_get_tc_compat_zrange_va()
2175 uint64_t va = radv_buffer_get_va(image->bo); in radv_get_ds_clear_value_va()
2883 return radv_buffer_get_va(accel->bo) + accel->mem_offset; in radv_accel_struct_get_va()
Dradv_sqtt.c69 uint64_t va = radv_buffer_get_va(device->thread_trace.bo); in radv_emit_thread_trace_start()
223 uint64_t va = radv_buffer_get_va(device->thread_trace.bo); in radv_copy_thread_trace_info_regs()
Dradv_radeon_winsys.h331 radv_buffer_get_va(struct radeon_winsys_bo *bo) in radv_buffer_get_va() function
Dradv_device.c3376 uint64_t esgs_va = radv_buffer_get_va(esgs_ring_bo); in fill_geom_tess_rings()
3416 uint64_t gsvs_va = radv_buffer_get_va(gsvs_ring_bo); in fill_geom_tess_rings()
3457 uint64_t tess_va = radv_buffer_get_va(tess_rings_bo); in fill_geom_tess_rings()
3611 tf_va = radv_buffer_get_va(tess_rings_bo); in radv_emit_tess_factor_ring()
3661 scratch_va = radv_buffer_get_va(compute_scratch_bo); in radv_emit_compute_scratch()
3682 va = radv_buffer_get_va(descriptor_bo); in radv_emit_global_shader_pointers()
3719 uint64_t va = radv_buffer_get_va(device->gfx_init); in radv_init_graphics_state()
3925 uint64_t scratch_va = radv_buffer_get_va(scratch_bo); in radv_get_preamble_cs()
6478 return radv_buffer_get_va(buffer->bo) + buffer->offset; in radv_GetBufferDeviceAddress()
6485 return buffer->bo ? radv_buffer_get_va(buffer->bo) + buffer->offset : 0; in radv_GetBufferOpaqueCaptureAddress()
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Dradv_descriptor_set.c617 set->header.va = pool->bo ? (radv_buffer_get_va(set->header.bo) + pool->current_offset) : 0; in radv_descriptor_set_create()
641 set->header.va = pool->bo ? (radv_buffer_get_va(set->header.bo) + offset) : 0; in radv_descriptor_set_create()
979 uint64_t va = radv_buffer_get_va(buffer->bo); in write_buffer_descriptor()
1042 va = radv_buffer_get_va(buffer->bo); in write_dynamic_buffer_descriptor()
Dradv_image.c670 uint64_t gpu_address = radv_buffer_get_va(buffer->bo); in radv_make_buffer_descriptor()
727 uint64_t gpu_address = image->bo ? radv_buffer_get_va(image->bo) + image->offset : 0; in si_set_mutable_tex_desc_fields()
972 uint64_t gpu_address = radv_buffer_get_va(image->bo); in gfx10_make_texture_descriptor()
1127 uint64_t gpu_address = radv_buffer_get_va(image->bo); in si_make_texture_descriptor()
Dradv_meta_fast_clear.c542 va = radv_buffer_get_va(image->bo) + image->offset; in radv_emit_set_predication_state_from_image()
Dradv_debug.c855 uint64_t tma_va = radv_buffer_get_va(device->tma_bo) + 16; in radv_trap_handler_init()
Dradv_shader.c2015 return radv_buffer_get_va(variant->bo) + variant->alloc->offset;
2033 uint64_t start = radv_buffer_get_va(block->arena->bo) + block->offset;
Dradv_acceleration_structure.c1928 radv_buffer_get_va(accel_struct->bo) + accel_struct->mem_offset + base, in radv_CmdBuildAccelerationStructuresKHR()
/third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_cs.c1054 ibs[j].ib_mc_address = radv_buffer_get_va(bos[j]); in radv_amdgpu_winsys_cs_submit_sysmem()
1100 ibs[0].ib_mc_address = radv_buffer_get_va(bos[0]); in radv_amdgpu_winsys_cs_submit_sysmem()