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Searched refs:radv_htile_enabled (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_meta_decompress.c585 if (!radv_htile_enabled(image, subresourceRange->baseMipLevel + l)) in radv_process_depth_stencil()
637 if (!radv_htile_enabled(image, subresourceRange->baseMipLevel + l)) in radv_expand_depth_stencil_compute()
Dradv_private.h2092 radv_htile_enabled(const struct radv_image *image, unsigned level) in radv_htile_enabled() function
Dradv_meta_clear.c666 if (radv_htile_enabled(iview->image, iview->base_mip) && iview->base_mip == 0 && in depth_view_can_fast_clear()
Dradv_device.c6945 if (radv_htile_enabled(iview->image, level)) { in radv_initialise_ds_surface()
7032 if (radv_htile_enabled(iview->image, level)) { in radv_initialise_ds_surface()
Dradv_cmd_buffer.c2124 assert(radv_htile_enabled(image, range.baseMipLevel)); in radv_update_ds_clear_metadata()
7356 if (!radv_htile_enabled(image, range->baseMipLevel)) in radv_handle_depth_image_transition()
/third_party/mesa3d/docs/relnotes/
D21.1.0.rst5072 - radv: teach radv_htile_enabled() about the number of HTILE levels