Searched refs:regIdx (Results 1 – 4 of 4) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 409 unsigned regIdx = 32; in MorphToIntPairReg() local
411 regIdx = Reg - Sparc::G0; in MorphToIntPairReg()
413 regIdx = Reg - Sparc::O0 + 8; in MorphToIntPairReg()
415 regIdx = Reg - Sparc::L0 + 16; in MorphToIntPairReg()
417 regIdx = Reg - Sparc::I0 + 24; in MorphToIntPairReg()
418 if (regIdx % 2 || regIdx > 31) in MorphToIntPairReg()
420 Op.Reg.RegNum = IntPairRegs[regIdx / 2]; in MorphToIntPairReg()
428 unsigned regIdx = Reg - Sparc::F0; in MorphToDoubleReg() local
429 if (regIdx % 2 || regIdx > 31) in MorphToDoubleReg()
431 Op.Reg.RegNum = DoubleRegs[regIdx / 2]; in MorphToDoubleReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.td | 76 class SIReg <string n, bits<16> regIdx = 0> :
83 let HWEncoding = regIdx;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 3301 char regIdx = '0' + (intVal % 8); in getRegForInlineAsmConstraint() local
3302 char tmp[] = { '{', regType, regIdx, '}', 0 }; in getRegForInlineAsmConstraint()
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| /third_party/sqlite/src/ |
| D | sqlite3.c | 126604 int regIdx; /* Range of registers hold conent for pIdx */
126638 regIdx = aRegIdx[ix]+1;
126644 sqlite3ExprCodeCopy(pParse, pIdx->aColExpr->a[i].pExpr, regIdx+i);
126649 sqlite3VdbeAddOp2(v, OP_IntCopy, x, regIdx+i);
126654 sqlite3VdbeAddOp2(v, OP_SCopy, x, regIdx+i);
126658 sqlite3VdbeAddOp3(v, OP_MakeRecord, regIdx, pIdx->nColumn, aRegIdx[ix]);
126665 sqlite3VdbeReleaseRegisters(pParse, regIdx, pIdx->nColumn, 0, 0);
126726 regIdx, pIdx->nKeyCol); VdbeCoverage(v);
126729 regR = pIdx==pPk ? regIdx : sqlite3GetTempRange(pParse, nPkField);
126763 int regCmp = (IsPrimaryKeyIndex(pIdx) ? regIdx : regR);
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