Searched refs:regmask (Results 1 – 7 of 7) sorted by relevance
| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3.h | 2223 __regmask_get(regmask_t *regmask, bool half, unsigned n) in __regmask_get() argument
2225 if (regmask->mergedregs) { in __regmask_get()
2234 return BITSET_TEST(regmask->mask, n); in __regmask_get()
2237 return BITSET_TEST(regmask->mask, n) || in __regmask_get()
2238 BITSET_TEST(regmask->mask, n + 1); in __regmask_get()
2246 return BITSET_TEST(regmask->mask, n); in __regmask_get()
2251 __regmask_set(regmask_t *regmask, bool half, unsigned n) in __regmask_set() argument
2253 if (regmask->mergedregs) { in __regmask_set()
2259 BITSET_SET(regmask->mask, n); in __regmask_set()
2262 BITSET_SET(regmask->mask, n); in __regmask_set()
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| /third_party/musl/arch/mips/bits/ |
| D | signal.h | 30 unsigned regmask, status; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 96 // Just to get the regmask, not for calling convention purposes.
101 // Just to get the regmask, not for calling convention purposes.
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.3.0.rst | 952 - ir3: Remove separate regmask.h
953 - ir3: Handle special regs in regmask
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| D | 20.1.0.rst | 3664 - freedreno/ir3: rewrite regmask to better support a6xx+
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| D | 19.1.0.rst | 4113 - freedreno/ir3: fix regmask for merged regs
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| D | 20.2.0.rst | 4183 - freedreno/ir3: split out regmask
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