Searched refs:resinfo (Results 1 – 15 of 15) sorted by relevance
/third_party/mesa3d/src/intel/tools/tests/gen6/ |
D | send.asm | 48 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; 52 … sampler MsgDesc: resinfo SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 8 { align1 1H }; 60 … sampler MsgDesc: resinfo SIMD4x2 Surface = 0 Sampler = 0 mlen 1 rlen 1 { align16 1Q }; 62 … sampler MsgDesc: resinfo SIMD4x2 Surface = 1 Sampler = 1 mlen 1 rlen 1 { align16 1Q }; 64 … sampler MsgDesc: resinfo SIMD4x2 Surface = 2 Sampler = 2 mlen 1 rlen 1 { align16 1Q }; 66 … sampler MsgDesc: resinfo SIMD4x2 Surface = 3 Sampler = 3 mlen 1 rlen 1 { align16 1Q }; 68 … sampler MsgDesc: resinfo SIMD4x2 Surface = 4 Sampler = 4 mlen 1 rlen 1 { align16 1Q }; 70 … sampler MsgDesc: resinfo SIMD4x2 Surface = 5 Sampler = 5 mlen 1 rlen 1 { align16 1Q }; 72 … sampler MsgDesc: resinfo SIMD4x2 Surface = 6 Sampler = 6 mlen 1 rlen 1 { align16 1Q }; 130 … sampler MsgDesc: resinfo SIMD4x2 Surface = 64 Sampler = 0 mlen 1 rlen 1 { align16 1Q }; [all …]
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/third_party/mesa3d/src/intel/tools/tests/gen5/ |
D | send.asm | 24 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 4 { align1 }; 26 … sampler MsgDesc: resinfo SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 8 { align1 }; 132 … sampler MsgDesc: resinfo SIMD8 Surface = 2 Sampler = 1 mlen 1 rlen 4 { align1 }; 134 … sampler MsgDesc: resinfo SIMD8 Surface = 3 Sampler = 2 mlen 1 rlen 4 { align1 }; 138 … sampler MsgDesc: resinfo SIMD8 Surface = 4 Sampler = 3 mlen 1 rlen 4 { align1 }; 140 … sampler MsgDesc: resinfo SIMD8 Surface = 5 Sampler = 4 mlen 1 rlen 4 { align1 }; 144 … sampler MsgDesc: resinfo SIMD8 Surface = 6 Sampler = 5 mlen 1 rlen 4 { align1 }; 148 … sampler MsgDesc: resinfo SIMD8 Surface = 7 Sampler = 6 mlen 1 rlen 4 { align1 }; 152 … sampler MsgDesc: resinfo SIMD8 Surface = 8 Sampler = 7 mlen 1 rlen 4 { align1 }; 156 … sampler MsgDesc: resinfo SIMD16 Surface = 2 Sampler = 1 mlen 2 rlen 8 { align1 }; [all …]
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/third_party/mesa3d/src/freedreno/ir3/ |
D | ir3_a6xx.c | 353 struct ir3_instruction *resinfo = ir3_RESINFO(b, ibo, 0); in emit_intrinsic_image_size() local 354 resinfo->cat6.iim_val = 1; in emit_intrinsic_image_size() 355 resinfo->cat6.d = intr->num_components; in emit_intrinsic_image_size() 356 resinfo->cat6.type = TYPE_U32; in emit_intrinsic_image_size() 357 resinfo->cat6.typed = false; in emit_intrinsic_image_size() 360 resinfo->dsts[0]->wrmask = MASK(3); in emit_intrinsic_image_size() 361 ir3_handle_bindless_cat6(resinfo, intr->src[0]); in emit_intrinsic_image_size() 362 ir3_handle_nonuniform(resinfo, intr); in emit_intrinsic_image_size() 364 ir3_split_dest(b, dst, resinfo, 0, intr->num_components); in emit_intrinsic_image_size()
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D | ir3_compiler_nir.c | 860 struct ir3_instruction *resinfo = ir3_RESINFO(b, ibo, 0); in emit_intrinsic_ssbo_size() local 861 resinfo->cat6.iim_val = 1; in emit_intrinsic_ssbo_size() 862 resinfo->cat6.d = ctx->compiler->gen >= 6 ? 1 : 2; in emit_intrinsic_ssbo_size() 863 resinfo->cat6.type = TYPE_U32; in emit_intrinsic_ssbo_size() 864 resinfo->cat6.typed = false; in emit_intrinsic_ssbo_size() 866 resinfo->dsts[0]->wrmask = MASK(3); in emit_intrinsic_ssbo_size() 867 ir3_handle_bindless_cat6(resinfo, intr->src[0]); in emit_intrinsic_ssbo_size() 868 ir3_handle_nonuniform(resinfo, intr); in emit_intrinsic_ssbo_size() 871 ir3_split_dest(b, dst, resinfo, 0, 1); in emit_intrinsic_ssbo_size() 875 ir3_split_dest(b, resinfo_dst, resinfo, 0, 2); in emit_intrinsic_ssbo_size()
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D | disasm-a3xx.c | 327 OPC(6, OPC_RESINFO, resinfo),
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/third_party/mesa3d/src/intel/tools/tests/gen7/ |
D | send.asm | 78 … sampler MsgDesc: resinfo SIMD4x2 Surface = 0 Sampler = 0 mlen 1 rlen 1 { align16 1Q }; 88 … sampler MsgDesc: resinfo SIMD4x2 Surface = 1 Sampler = 1 mlen 1 rlen 1 { align16 1Q }; 90 … sampler MsgDesc: resinfo SIMD4x2 Surface = 2 Sampler = 2 mlen 1 rlen 1 { align16 1Q }; 92 … sampler MsgDesc: resinfo SIMD4x2 Surface = 3 Sampler = 3 mlen 1 rlen 1 { align16 1Q }; 94 … sampler MsgDesc: resinfo SIMD4x2 Surface = 4 Sampler = 4 mlen 1 rlen 1 { align16 1Q }; 96 … sampler MsgDesc: resinfo SIMD4x2 Surface = 5 Sampler = 5 mlen 1 rlen 1 { align16 1Q }; 98 … sampler MsgDesc: resinfo SIMD4x2 Surface = 6 Sampler = 6 mlen 1 rlen 1 { align16 1Q }; 126 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; 128 … sampler MsgDesc: resinfo SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 8 { align1 1H }; 160 … sampler MsgDesc: resinfo SIMD8 Surface = 2 Sampler = 1 mlen 1 rlen 4 { align1 1Q }; [all …]
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/third_party/mesa3d/src/intel/tools/tests/gen7.5/ |
D | send.asm | 92 … sampler MsgDesc: resinfo SIMD4x2 Surface = 0 Sampler = 0 mlen 1 rlen 1 { align16 1Q }; 94 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; 98 … sampler MsgDesc: resinfo SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 8 { align1 1H }; 110 … sampler MsgDesc: resinfo SIMD4x2 Surface = 1 Sampler = 1 mlen 1 rlen 1 { align16 1Q }; 112 … sampler MsgDesc: resinfo SIMD4x2 Surface = 2 Sampler = 2 mlen 1 rlen 1 { align16 1Q }; 114 … sampler MsgDesc: resinfo SIMD4x2 Surface = 3 Sampler = 3 mlen 1 rlen 1 { align16 1Q }; 116 … sampler MsgDesc: resinfo SIMD4x2 Surface = 4 Sampler = 4 mlen 1 rlen 1 { align16 1Q }; 118 … sampler MsgDesc: resinfo SIMD4x2 Surface = 5 Sampler = 5 mlen 1 rlen 1 { align16 1Q }; 120 … sampler MsgDesc: resinfo SIMD4x2 Surface = 6 Sampler = 6 mlen 1 rlen 1 { align16 1Q }; 616 … sampler MsgDesc: resinfo SIMD8 Surface = 3 Sampler = 2 mlen 1 rlen 4 { align1 1Q }; [all …]
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/third_party/mesa3d/src/intel/tools/tests/gen9/ |
D | send.asm | 48 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 2 { align1 1Q }; 52 … sampler MsgDesc: resinfo SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 4 { align1 1H }; 86 … sampler MsgDesc: resinfo SIMD8 Surface = 0 Sampler = 0 mlen 1 rlen 2 { align1 1Q }; 134 … sampler MsgDesc: resinfo SIMD8 Surface = 0 Sampler = 0 mlen 1 rlen 3 { align1 1Q }; 158 … sampler MsgDesc: resinfo SIMD8 Surface = 0 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; 160 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 1 mlen 1 rlen 4 { align1 1Q }; 162 … sampler MsgDesc: resinfo SIMD8 Surface = 2 Sampler = 2 mlen 1 rlen 4 { align1 1Q }; 164 … sampler MsgDesc: resinfo SIMD8 Surface = 3 Sampler = 3 mlen 1 rlen 4 { align1 1Q }; 166 … sampler MsgDesc: resinfo SIMD8 Surface = 4 Sampler = 4 mlen 1 rlen 4 { align1 1Q }; 168 … sampler MsgDesc: resinfo SIMD8 Surface = 5 Sampler = 5 mlen 1 rlen 4 { align1 1Q }; [all …]
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/third_party/mesa3d/src/intel/tools/tests/gen8/ |
D | send.asm | 70 … sampler MsgDesc: resinfo SIMD8 Surface = 0 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; 130 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; 134 … sampler MsgDesc: resinfo SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 8 { align1 1H }; 154 … sampler MsgDesc: resinfo SIMD8 Surface = 1 Sampler = 1 mlen 1 rlen 4 { align1 1Q }; 156 … sampler MsgDesc: resinfo SIMD8 Surface = 2 Sampler = 2 mlen 1 rlen 4 { align1 1Q }; 158 … sampler MsgDesc: resinfo SIMD8 Surface = 3 Sampler = 3 mlen 1 rlen 4 { align1 1Q }; 160 … sampler MsgDesc: resinfo SIMD8 Surface = 4 Sampler = 4 mlen 1 rlen 4 { align1 1Q }; 162 … sampler MsgDesc: resinfo SIMD8 Surface = 5 Sampler = 5 mlen 1 rlen 4 { align1 1Q }; 164 … sampler MsgDesc: resinfo SIMD8 Surface = 6 Sampler = 6 mlen 1 rlen 4 { align1 1Q }; 1328 … sampler MsgDesc: resinfo SIMD8 Surface = 3 Sampler = 2 mlen 1 rlen 4 { align1 1Q }; [all …]
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/third_party/mesa3d/src/amd/llvm/ |
D | ac_nir_to_llvm.c | 1417 struct ac_image_args resinfo = {0}; in lower_gather4_integer() local 1448 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array); in lower_gather4_integer() 1449 resinfo.opcode = ac_image_get_resinfo; in lower_gather4_integer() 1450 resinfo.dmask = 0xf; in lower_gather4_integer() 1451 resinfo.lod = ctx->i32_0; in lower_gather4_integer() 1452 resinfo.resource = args->resource; in lower_gather4_integer() 1453 resinfo.attributes = AC_FUNC_ATTR_READNONE; in lower_gather4_integer() 1454 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo); in lower_gather4_integer()
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/third_party/mesa3d/docs/gallium/ |
D | tgsi.rst | 2484 still in dst.w. In contrast to d3d10 resinfo, there's no way in the tgsi 2487 resinfo allowing swizzling dst values is ignored (due to the interaction
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/third_party/mesa3d/docs/relnotes/ |
D | 21.3.0.rst | 1056 - ir3/a6xx,freedreno: account for resinfo return size dependency on IBO_0_FMT 1073 - ir3: support source modes for resinfo.b 1074 - ir3/freedreno: handle non-uniform resinfo 1329 - freedreno/ir3: Use the resinfo path for ssbo sizes on GL, too.
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D | 20.2.0.rst | 1725 - freedreno: Add more resinfo/ldgb testcases. 1726 - freedreno: Fix resinfo asm, which doesn't have srcs besides IBO number. 2787 - freedreno/ir3: fix resinfo wrmask
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D | 21.0.0.rst | 2902 - freedreno/ir3: Tweak ldib/resinfo encoding 2909 - freedreno/ir3/parser: Fix pre-a6xx resinfo
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D | 21.1.0.rst | 4852 - freedreno/ir3: Small resinfo disasm tweak
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