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/third_party/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_bo.c46 radeon_winsys_bo_create(struct radeon_winsys *rws,
68 return drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_BUSY, in radeon_real_bo_is_busy()
80 mtx_lock(&bo->rws->bo_fence_lock); in radeon_bo_is_busy()
91 mtx_unlock(&bo->rws->bo_fence_lock); in radeon_bo_is_busy()
101 while (drmCommandWrite(bo->rws->fd, DRM_RADEON_GEM_WAIT_IDLE, in radeon_real_bo_wait_idle()
110 mtx_lock(&bo->rws->bo_fence_lock); in radeon_bo_wait_idle()
114 mtx_unlock(&bo->rws->bo_fence_lock); in radeon_bo_wait_idle()
119 mtx_lock(&bo->rws->bo_fence_lock); in radeon_bo_wait_idle()
128 mtx_unlock(&bo->rws->bo_fence_lock); in radeon_bo_wait_idle()
132 static bool radeon_bo_wait(struct radeon_winsys *rws, in radeon_bo_wait() argument
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Dradeon_drm_winsys.c619 static void radeon_winsys_destroy(struct radeon_winsys *rws) in radeon_winsys_destroy() argument
621 struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; in radeon_winsys_destroy()
648 FREE(rws); in radeon_winsys_destroy()
651 static void radeon_query_info(struct radeon_winsys *rws, in radeon_query_info() argument
656 *info = ((struct radeon_drm_winsys *)rws)->info; in radeon_query_info()
693 static uint64_t radeon_query_value(struct radeon_winsys *rws, in radeon_query_value() argument
696 struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; in radeon_query_value()
763 static bool radeon_read_registers(struct radeon_winsys *rws, in radeon_read_registers() argument
767 struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; in radeon_read_registers()
784 struct radeon_drm_winsys *rws = (struct radeon_drm_winsys*)ws; in radeon_winsys_unref() local
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Dradeon_drm_bo.h56 struct radeon_drm_winsys *rws; member
Dradeon_drm_cs.h109 return num_refs == bo->rws->num_cs || in radeon_bo_is_referenced_by_cs()
/third_party/mesa3d/src/gallium/drivers/r300/
Dr300_screen_buffer.c90 struct radeon_winsys *rws = r300->screen->rws; in r300_buffer_transfer_map() local
113 if (r300->rws->cs_is_buffer_referenced(&r300->cs, rbuf->buf, RADEON_USAGE_READWRITE) || in r300_buffer_transfer_map()
114 !r300->rws->buffer_wait(r300->rws, rbuf->buf, 0, RADEON_USAGE_READWRITE)) { in r300_buffer_transfer_map()
119 new_buf = r300->rws->buffer_create(r300->rws, rbuf->b.width0, in r300_buffer_transfer_map()
145 map = rws->buffer_map(rws, rbuf->buf, &r300->cs, usage); in r300_buffer_transfer_map()
190 r300screen->rws->buffer_create(r300screen->rws, rbuf->b.width0, in r300_buffer_create()
Dr300_screen.c668 struct radeon_winsys *rws = radeon_winsys(pscreen); in r300_destroy_screen() local
670 if (rws && !rws->unref(rws)) in r300_destroy_screen()
678 if (rws) in r300_destroy_screen()
679 rws->destroy(rws); in r300_destroy_screen()
688 struct radeon_winsys *rws = r300_screen(screen)->rws; in r300_fence_reference() local
690 rws->fence_reference(ptr, fence); in r300_fence_reference()
698 struct radeon_winsys *rws = r300_screen(screen)->rws; in r300_fence_finish() local
700 return rws->fence_wait(rws, fence, timeout); in r300_fence_finish()
703 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws, in r300_screen_create() argument
713 rws->query_info(rws, &r300screen->info, false, false); in r300_screen_create()
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Dr300_query.c62 q->buf = r300->rws->buffer_create(r300->rws, in r300_create_query()
153 r300->rws->buffer_wait(r300->rws, q->buf, PIPE_TIMEOUT_INFINITE, in r300_get_query_result()
157 vresult->b = r300->rws->buffer_wait(r300->rws, q->buf, 0, RADEON_USAGE_READWRITE); in r300_get_query_result()
162 map = r300->rws->buffer_map(r300->rws, q->buf, &r300->cs, in r300_get_query_result()
Dr300_flush.c56 r300->rws->cs_flush(&r300->cs, flags, fence); in r300_flush_and_cleanup()
89 r300->rws->cs_flush(&r300->cs, flags, fence); in r300_flush()
93 r300->rws->cs_flush(&r300->cs, flags, NULL); in r300_flush()
116 r300->rws->fence_reference(fence, NULL); in r300_flush()
121 r300->rws->cs_request_feature(&r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, in r300_flush()
Dr300_transfer.c115 r300->rws->cs_is_buffer_referenced(&r300->cs, tex->buf, RADEON_USAGE_READWRITE); in r300_texture_transfer_map()
120 !r300->rws->buffer_wait(r300->rws, tex->buf, 0, RADEON_USAGE_READWRITE); in r300_texture_transfer_map()
218 map = r300->rws->buffer_map(r300->rws, trans->linear_texture->buf, in r300_texture_transfer_map()
230 map = r300->rws->buffer_map(r300->rws, tex->buf, &r300->cs, usage); in r300_texture_transfer_map()
Dr300_context.c78 r300->rws->cs_request_feature(&r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE); in r300_destroy_context()
81 r300->rws->cs_request_feature(&r300->cs, RADEON_FID_R300_CMASK_ACCESS, FALSE); in r300_destroy_context()
97 r300->rws->cs_destroy(&r300->cs); in r300_destroy_context()
99 r300->rws->ctx_destroy(r300->ctx); in r300_destroy_context()
376 struct radeon_winsys *rws = r300screen->rws; local
381 r300->rws = rws;
391 r300->ctx = rws->ctx_create(rws);
396 if (!rws->cs_create(&r300->cs, r300->ctx, RING_GFX, r300_flush_callback, r300, false))
Dr300_texture.c1030 struct radeon_winsys *rws = r300_screen(screen)->rws; in r300_resource_get_handle() local
1040 return rws->buffer_get_handle(rws, tex->buf, whandle); in r300_resource_get_handle()
1052 struct radeon_winsys *rws = rscreen->rws; in r300_texture_create_object() local
1099 tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048, in r300_texture_create_object()
1119 rws->buffer_set_metadata(rws, tex->buf, &tiling, NULL); in r300_texture_create_object()
1158 struct radeon_winsys *rws = rscreen->rws; in r300_texture_from_handle() local
1170 buffer = rws->buffer_from_handle(rws, whandle, 0); in r300_texture_from_handle()
1174 rws->buffer_get_metadata(rws, buffer, &tiling, NULL); in r300_texture_from_handle()
Dr300_screen.h39 struct radeon_winsys *rws; member
65 return r300_screen(screen)->rws; in radeon_winsys()
Dr300_render.c219 if (!r300->rws->cs_check_space(&r300->cs, cs_dwords, false)) { in r300_reserve_cs_dwords()
377 map[vbi] = (uint32_t*)r300->rws->buffer_map(r300->rws, in r300_draw_arrays_immediate()
614 uint16_t *ptr = r300->rws->buffer_map(r300->rws, r300_resource(orgIndexBuffer)->buf, in r300_draw_elements()
932 struct radeon_winsys *rws = r300->rws; in r300_render_allocate_vertices() local
942 r300->vbo = rws->buffer_create(rws, in r300_render_allocate_vertices()
951 r300render->vbo_ptr = rws->buffer_map(rws, r300->vbo, &r300->cs, in r300_render_allocate_vertices()
Dr300_public.h12 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
Dr300_emit.c1054 OUT_CS(r300->rws->cs_lookup_buffer(&r300->cs, r300->vbo) * 4); in r300_emit_vertex_arrays_swtcl()
1325 r300->rws->cs_add_buffer(&r300->cs, tex->buf, in r300_emit_buffer_validate()
1336 r300->rws->cs_add_buffer(&r300->cs, tex->buf, in r300_emit_buffer_validate()
1347 r300->rws->cs_add_buffer(&r300->cs, aa->dest->buf, in r300_emit_buffer_validate()
1361 r300->rws->cs_add_buffer(&r300->cs, tex->buf, in r300_emit_buffer_validate()
1368 r300->rws->cs_add_buffer(&r300->cs, r300->query_current->buf, in r300_emit_buffer_validate()
1374 r300->rws->cs_add_buffer(&r300->cs, r300->vbo, in r300_emit_buffer_validate()
1390 r300->rws->cs_add_buffer(&r300->cs, r300_resource(buf)->buf, in r300_emit_buffer_validate()
1398 r300->rws->cs_add_buffer(&r300->cs, r300_resource(index_buffer)->buf, in r300_emit_buffer_validate()
1404 if (!r300->rws->cs_validate(&r300->cs)) { in r300_emit_buffer_validate()
Dr300_cs.h43 struct radeon_winsys *cs_winsys = (context)->rws; \
/third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_winsys.c66 radv_amdgpu_winsys_query_info(struct radeon_winsys *rws, struct radeon_info *info) in radv_amdgpu_winsys_query_info() argument
68 *info = ((struct radv_amdgpu_winsys *)rws)->info; in radv_amdgpu_winsys_query_info()
72 radv_amdgpu_winsys_query_value(struct radeon_winsys *rws, enum radeon_value_id value) in radv_amdgpu_winsys_query_value() argument
74 struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys *)rws; in radv_amdgpu_winsys_query_value()
124 radv_amdgpu_winsys_read_registers(struct radeon_winsys *rws, unsigned reg_offset, in radv_amdgpu_winsys_read_registers() argument
127 struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys *)rws; in radv_amdgpu_winsys_read_registers()
133 radv_amdgpu_winsys_get_chip_name(struct radeon_winsys *rws) in radv_amdgpu_winsys_get_chip_name() argument
135 amdgpu_device_handle dev = ((struct radv_amdgpu_winsys *)rws)->dev; in radv_amdgpu_winsys_get_chip_name()
144 radv_amdgpu_winsys_destroy(struct radeon_winsys *rws) in radv_amdgpu_winsys_destroy() argument
146 struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys *)rws; in radv_amdgpu_winsys_destroy()
[all …]
/third_party/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_winsys.c156 static void amdgpu_winsys_destroy(struct radeon_winsys *rws) in amdgpu_winsys_destroy() argument
158 struct amdgpu_screen_winsys *sws = amdgpu_screen_winsys(rws); in amdgpu_winsys_destroy()
185 FREE(rws); in amdgpu_winsys_destroy()
188 static void amdgpu_winsys_query_info(struct radeon_winsys *rws, in amdgpu_winsys_query_info() argument
193 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_winsys_query_info()
210 static uint64_t amdgpu_query_value(struct radeon_winsys *rws, in amdgpu_query_value() argument
213 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_query_value()
279 static bool amdgpu_read_registers(struct radeon_winsys *rws, in amdgpu_read_registers() argument
283 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_read_registers()
289 static bool amdgpu_winsys_unref(struct radeon_winsys *rws) in amdgpu_winsys_unref() argument
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Damdgpu_bo.c50 static bool amdgpu_bo_wait(struct radeon_winsys *rws, in amdgpu_bo_wait() argument
54 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_bo_wait()
227 static void amdgpu_bo_destroy_or_cache(struct radeon_winsys *rws, struct pb_buffer *_buf) in amdgpu_bo_destroy_or_cache() argument
229 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_bo_destroy_or_cache()
251 static bool amdgpu_bo_do_map(struct radeon_winsys *rws, struct amdgpu_winsys_bo *bo, void **cpu) in amdgpu_bo_do_map() argument
253 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_bo_do_map()
276 void *amdgpu_bo_map(struct radeon_winsys *rws, in amdgpu_bo_map() argument
281 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_bo_map()
307 if (!amdgpu_bo_wait(rws, (struct pb_buffer*)bo, 0, in amdgpu_bo_map()
318 if (!amdgpu_bo_wait(rws, (struct pb_buffer*)bo, 0, in amdgpu_bo_map()
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Damdgpu_bo.h127 void *amdgpu_bo_map(struct radeon_winsys *rws,
131 void amdgpu_bo_unmap(struct radeon_winsys *rws, struct pb_buffer *buf);
Damdgpu_surface.c63 static int amdgpu_surface_init(struct radeon_winsys *rws, in amdgpu_surface_init() argument
69 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_surface_init()
Damdgpu_cs.c58 amdgpu_fence_import_syncobj(struct radeon_winsys *rws, int fd) in amdgpu_fence_import_syncobj() argument
60 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_fence_import_syncobj()
83 amdgpu_fence_import_sync_file(struct radeon_winsys *rws, int fd) in amdgpu_fence_import_sync_file() argument
85 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_fence_import_sync_file()
114 static int amdgpu_fence_export_sync_file(struct radeon_winsys *rws, in amdgpu_fence_export_sync_file() argument
117 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_fence_export_sync_file()
140 static int amdgpu_export_signalled_sync_file(struct radeon_winsys *rws) in amdgpu_export_signalled_sync_file() argument
142 struct amdgpu_winsys *ws = amdgpu_winsys(rws); in amdgpu_export_signalled_sync_file()
247 static bool amdgpu_fence_wait_rel_timeout(struct radeon_winsys *rws, in amdgpu_fence_wait_rel_timeout() argument
1225 static void amdgpu_cs_add_fence_dependency(struct radeon_cmdbuf *rws, in amdgpu_cs_add_fence_dependency() argument
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/third_party/pcre2/pcre2/src/
Dpcre2_dfa_match.c415 RWS_anchor *rws = *rwsptr; in more_workspace() local
418 if (rws->next != NULL) in more_workspace()
420 new = rws->next; in more_workspace()
429 uint32_t newsize = (rws->size >= UINT32_MAX/2)? UINT32_MAX/2 : rws->size * 2; in more_workspace()
443 rws->next = new; in more_workspace()
2695 RWS_anchor *rws = (RWS_anchor *)RWS; in internal_dfa_match() local
2697 if (rws->free < RWS_RSIZE + RWS_OVEC_OSIZE) in internal_dfa_match()
2699 rc = more_workspace(&rws, RWS_OVEC_OSIZE, mb); in internal_dfa_match()
2701 RWS = (int *)rws; in internal_dfa_match()
2704 local_offsets = (PCRE2_SIZE *)(RWS + rws->size - rws->free); in internal_dfa_match()
[all …]
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_fence.c225 static bool si_fine_fence_signaled(struct radeon_winsys *rws, const struct si_fine_fence *fine) in si_fine_fence_signaled() argument
228 rws->buffer_map(rws, fine->buf->buf, NULL, PIPE_MAP_READ | PIPE_MAP_UNSYNCHRONIZED); in si_fine_fence_signaled()
269 struct radeon_winsys *rws = ((struct si_screen *)screen)->ws; in si_fence_finish() local
309 if (sfence->fine.buf && si_fine_fence_signaled(rws, &sfence->fine)) { in si_fence_finish()
310 rws->fence_reference(&sfence->gfx, NULL); in si_fence_finish()
354 if (rws->fence_wait(rws, sfence->gfx, timeout)) in si_fence_finish()
359 if (sfence->fine.buf && si_fine_fence_signaled(rws, &sfence->fine)) in si_fence_finish()
/third_party/mesa3d/src/amd/vulkan/winsys/null/
Dradv_null_winsys.c72 radv_null_winsys_query_info(struct radeon_winsys *rws, struct radeon_info *info) in radv_null_winsys_query_info() argument
154 radv_null_winsys_destroy(struct radeon_winsys *rws) in radv_null_winsys_destroy() argument
156 FREE(rws); in radv_null_winsys_destroy()

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