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/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_sdma_copy_image.c113 bool si_sdma_v4_v5_copy_texture(struct si_context *sctx, struct si_texture *sdst, struct si_texture… in si_sdma_v4_v5_copy_texture() argument
115 unsigned bpp = sdst->surface.bpe; in si_sdma_v4_v5_copy_texture()
116 uint64_t dst_address = sdst->buffer.gpu_address + sdst->surface.u.gfx9.surf_offset; in si_sdma_v4_v5_copy_texture()
118 unsigned dst_pitch = sdst->surface.u.gfx9.surf_pitch; in si_sdma_v4_v5_copy_texture()
124 assert (!tmz || (sdst->buffer.flags & RADEON_FLAG_ENCRYPTED)); in si_sdma_v4_v5_copy_texture()
127 if (ssrc->surface.is_linear && sdst->surface.is_linear) { in si_sdma_v4_v5_copy_texture()
136 dst_address += sdst->surface.u.gfx9.offset[0]; in si_sdma_v4_v5_copy_texture()
153 if (ssrc->surface.is_linear != sdst->surface.is_linear) { in si_sdma_v4_v5_copy_texture()
154 struct si_texture *tiled = ssrc->surface.is_linear ? sdst : ssrc; in si_sdma_v4_v5_copy_texture()
155 struct si_texture *linear = tiled == ssrc ? sdst : ssrc; in si_sdma_v4_v5_copy_texture()
[all …]
Dsi_cp_dma.c193 struct si_resource *sdst = si_resource(dst); in si_cp_dma_clear_buffer() local
194 uint64_t va = (sdst ? sdst->gpu_address : 0) + offset; in si_cp_dma_clear_buffer()
208 if (sdst) { in si_cp_dma_clear_buffer()
209 util_range_add(dst, &sdst->valid_buffer_range, offset, offset + size); in si_cp_dma_clear_buffer()
217 unsigned dma_flags = CP_DMA_CLEAR | (sdst ? 0 : CP_DMA_DST_IS_GDS); in si_cp_dma_clear_buffer()
229 if (sdst && cache_policy != L2_BYPASS) in si_cp_dma_clear_buffer()
230 sdst->TC_L2_dirty = true; in si_cp_dma_clear_buffer()
Dsi_fence.c188 struct si_fence **sdst = (struct si_fence **)dst; in si_fence_reference() local
191 if (pipe_reference(&(*sdst)->reference, &ssrc->reference)) { in si_fence_reference()
192 ws->fence_reference(&(*sdst)->gfx, NULL); in si_fence_reference()
193 tc_unflushed_batch_token_reference(&(*sdst)->tc_token, NULL); in si_fence_reference()
194 si_resource_reference(&(*sdst)->fine.buf, NULL); in si_fence_reference()
195 FREE(*sdst); in si_fence_reference()
197 *sdst = ssrc; in si_fence_reference()
Dsi_test_blit.c204 struct si_texture *sdst; in si_test_blit() local
278 sdst = (struct si_texture *)dst; in si_test_blit()
286 array_mode_to_string(sscreen, &sdst->surface), tsrc.width0, tsrc.height0, in si_test_blit()
296 si_clear_buffer(sctx, dst, 0, sdst->surface.surf_size, &zero, 4, SI_OP_SYNC_BEFORE_AFTER, in si_test_blit()
327 if (!ssrc->surface.is_linear && !sdst->surface.is_linear && rand() & 1) { in si_test_blit()
353 if (ssrc->surface.is_linear && !sdst->surface.is_linear && rand() % 4 == 0) { in si_test_blit()
Dsi_buffer.c282 struct si_resource *sdst = si_resource(dst); in si_replace_buffer_storage() local
285 radeon_bo_reference(sctx->screen->ws, &sdst->buf, ssrc->buf); in si_replace_buffer_storage()
286 sdst->gpu_address = ssrc->gpu_address; in si_replace_buffer_storage()
287 sdst->b.b.bind = ssrc->b.b.bind; in si_replace_buffer_storage()
288 sdst->flags = ssrc->flags; in si_replace_buffer_storage()
290 assert(sdst->memory_usage_kb == ssrc->memory_usage_kb); in si_replace_buffer_storage()
291 assert(sdst->bo_size == ssrc->bo_size); in si_replace_buffer_storage()
292 assert(sdst->bo_alignment_log2 == ssrc->bo_alignment_log2); in si_replace_buffer_storage()
293 assert(sdst->domains == ssrc->domains); in si_replace_buffer_storage()
Dsi_compute_blit.c426 struct si_texture *sdst = (struct si_texture*)dst; in si_compute_copy_image() local
432 bool is_linear = ssrc->surface.is_linear || sdst->surface.is_linear; in si_compute_copy_image()
437 !vi_dcc_enabled(sdst, dst_level) && in si_compute_copy_image()
485 sdst->surface.u.gfx9.color.dcc.pipe_aligned); in si_compute_copy_image()
Dsi_blit.c909 struct si_texture *sdst = (struct si_texture *)dst; in si_resource_copy_region() local
927 (!vi_dcc_enabled(sdst, dst_level) || sctx->chip_class >= GFX10) && in si_resource_copy_region()
1227 struct si_texture *sdst = (struct si_texture *)info->dst.resource; in si_blit() local
1233 if (info->is_dri_blit_image && sdst->surface.is_linear && in si_blit()
1234 sctx->chip_class >= GFX7 && sdst->surface.flags & RADEON_SURF_IMPORTED) { in si_blit()
1245 if (async_copy && sctx->chip_class < GFX10_3 && si_sdma_copy_image(sctx, sdst, ssrc)) in si_blit()
Dsi_clear.c1082 struct si_texture *sdst = (struct si_texture *)dst->texture; in si_clear_render_target() local
1085 (sctx->chip_class >= GFX10 || !vi_dcc_enabled(sdst, dst->u.tex.level))) { in si_clear_render_target()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td71 bits<7> sdst;
76 let Inst{22-16} = !if(ps.has_sdst, sdst, ?);
81 opName, (outs SReg_32:$sdst),
84 "$sdst, $src0", pattern> {
85 let Constraints = !if(tied_in, "$sdst = $sdst_in", "");
90 opName, (outs SReg_32:$sdst), (ins SReg_32:$src0),
91 "$sdst, $src0", pattern>;
107 opName, (outs SReg_64:$sdst), (ins SSrc_b64:$src0),
108 "$sdst, $src0", pattern
113 opName, (outs SReg_64:$sdst), (ins SReg_64:$src0),
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DSMInstructions.td60 bits<7> sdst;
113 (outs dstClass:$sdst),
115 " $sdst, $sbase, $offset$glc$dlc", []> {
124 (outs dstClass:$sdst),
126 " $sdst, $sbase, $offset$glc$dlc", []> {
161 opName, (outs SReg_64_XEXEC:$sdst), (ins),
162 " $sdst", [(set i64:$sdst, (node))]> {
193 opName, (outs SReg_32_XM0_XEXEC:$sdst), (ins),
194 " $sdst", [(set i32:$sdst, (node))]> {
229 !if(isRet, (outs dataClass:$sdst), (outs)),
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DVOPCInstructions.td59 let Outs64 = (outs VOPDstS64orS32:$sdst);
129 // This class is used only with VOPC instructions. Use $sdst for out operand
141 (inst p.DstRC:$sdst),
144 (inst p.DstRC:$sdst, p.Src0RC32:$src0),
147 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1),
188 [(set i1:$sdst,
195 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]);
625 let Asm64 = "$sdst, $src0_modifiers, $src1";
651 [(set i1:$sdst,
883 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst.
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DSIPeepholeSDWA.cpp894 const MachineOperand *Sdst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2()
909 MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2()
959 const MachineOperand *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in isConvertibleToSDWA()
970 } else if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst) || in isConvertibleToSDWA()
1020 } else if ((Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst))) { in convertToSDWA()
1022 AMDGPU::getNamedOperandIdx(SDWAOpcode, AMDGPU::OpName::sdst) != -1); in convertToSDWA()
1025 assert(AMDGPU::getNamedOperandIdx(SDWAOpcode, AMDGPU::OpName::sdst) != -1); in convertToSDWA()
DVOPInstructions.td279 bits<7> sdst;
283 let Inst{14-8} = sdst;
467 bits<8> sdst; // {vcc_sdst{0}, sdst{6-0}}
469 let Inst{46-40} = !if(P.EmitDst, sdst{6-0}, ?);
470 let Inst{47} = !if(P.EmitDst, sdst{7}, 0);
DSIInstrInfo.td1874 (outs DstRCSDWA:$sdst),
1883 string dst = !if(!eq(DstVT.Size, 1), "$sdst", "$vdst"); // use $sdst for VOPC
1897 string dst = !if(!eq(DstVT.Size, 1), "$sdst", "$vdst"); // use $sdst for VOPC
1960 "$sdst",
1962 ""); // use $sdst for VOPC
1980 "$sdst",
1982 ""); // use $sdst for VOPC
2025 "$sdst", // VOPC
2521 // Maps a v_cmpx opcode with sdst to opcode without sdst.
DSIInstructions.td138 def ENTER_WWM : SPseudoInstSI <(outs SReg_1:$sdst), (ins i64imm:$src0)> {
145 def EXIT_WWM : SPseudoInstSI <(outs SReg_1:$sdst), (ins SReg_1:$src0)> {
178 (outs SReg_64:$vdst, VOPDstS64orS32:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1)
182 (outs SReg_64:$vdst, VOPDstS64orS32:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1)
187 def GET_GROUPSTATICSIZE : SPseudoInstSI <(outs SReg_32:$sdst), (ins),
188 [(set SReg_32:$sdst, (int_amdgcn_groupstaticsize))]>;
DVOP3Instructions.td196 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
197 let Asm64 = " $vdst, $sdst, $src0, $src1, $src2";
216 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
217 let Asm64 = " $vdst, $sdst, $src0, $src1, $src2$clamp";
DGCNHazardRecognizer.cpp960 SDSTName = AMDGPU::OpName::sdst; in fixSMEMtoVectorWriteHazards()
1052 if (TII->getNamedOperand(*MI, AMDGPU::OpName::sdst)) in fixVcmpxExecWARHazard()
DAMDGPU.td329 def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
457 def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
DVOP2Instructions.td345 let Asm64 = "$vdst, $sdst, $src0, $src1$clamp";
352 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
359 let Asm64 = "$vdst, $sdst, $src0, $src1, $src2$clamp";
366 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
DSIShrinkInstructions.cpp757 AMDGPU::OpName::sdst); in runOnMachineFunction()
DSILoadStoreOptimizer.cpp1204 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::sdst); in mergeSBufferLoadImmPair()
1205 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::sdst); in mergeSBufferLoadImmPair()
/third_party/icu/icu4j/main/classes/localespi/src/com/ibm/icu/impl/javaspi/util/
DTimeZoneNameProviderICU.java35 String sdst = tznames.getDisplayName(canonicalID, NameType.SHORT_DAYLIGHT, date); in getDisplayName() local
37 if (lstd != null && ldst != null && sstd != null && sdst != null) { in getDisplayName()
43 dispName = daylight ? sdst : sstd; in getDisplayName()
/third_party/gstreamer/gstplugins_good/gst/deinterlace/
Dyadif.c241 sdst[x] = spatial_pred; \
246 filter_line_c (guint8 * sdst, const guint8 * stzero, const guint8 * sbzero, in filter_line_c() argument
280 guint8 *sdst = (guint8 *) dst + 3; in filter_line_c_planar() local
328 filter_edges (guint8 * sdst, const guint8 * stzero, const guint8 * sbzero, in filter_edges() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.cpp425 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst) != -1) in convertSDWAInst()
429 int SDst = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst); in convertSDWAInst()
433 AMDGPU::OpName::sdst); in convertSDWAInst()
/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_surface.c974 struct ureg_dst sdst = ureg_writemask(data, TGSI_WRITEMASK_Y); in nv50_blitter_make_fp() local
999 ureg_I2F(ureg, sdst, ssrc); in nv50_blitter_make_fp()

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