| /third_party/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_blit.c | 217 struct radeon_bo *src_bo, in validate_buffers() argument
225 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); in validate_buffers()
325 struct radeon_bo *src_bo, in r100_blit() argument
367 if (src_bo == dst_bo) { in r100_blit()
381 src_bo); in r100_blit()
393 if (!validate_buffers(r100, src_bo, dst_bo)) in r100_blit()
399 emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch); in r100_blit()
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| D | radeon_blit.h | 36 struct radeon_bo *src_bo,
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| D | radeon_mipmap_tree.c | 558 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; in radeon_validate_texture_miptree() local
559 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) { in radeon_validate_texture_miptree()
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| D | radeon_common_context.h | 443 struct radeon_bo *src_bo,
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_meta_buffer.c | 242 copy_buffer_shader(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *src_bo, in copy_buffer_shader() argument
254 radv_buffer_init(&src_buffer, cmd_buffer->device, src_bo, size, src_offset); in copy_buffer_shader()
292 struct radeon_winsys_bo *src_bo, struct radeon_winsys_bo *dst_bo) in radv_prefer_compute_dma() argument
298 if ((src_bo && !(src_bo->initial_domain & RADEON_DOMAIN_VRAM)) || in radv_prefer_compute_dma()
337 radv_copy_buffer(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *src_bo, in radv_copy_buffer() argument
342 radv_prefer_compute_dma(cmd_buffer->device, size, src_bo, dst_bo); in radv_copy_buffer()
345 copy_buffer_shader(cmd_buffer, src_bo, dst_bo, src_offset, dst_offset, size); in radv_copy_buffer()
347 uint64_t src_va = radv_buffer_get_va(src_bo); in radv_copy_buffer()
352 radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, src_bo); in radv_copy_buffer()
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| D | radv_query.c | 807 struct radeon_winsys_bo *src_bo, struct radeon_winsys_bo *dst_bo, in radv_query_shader() argument
838 radv_buffer_init(&src_buffer, device, src_bo, src_buffer_size, src_offset); in radv_query_shader()
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| /third_party/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_blit.c | 368 struct radeon_bo *src_bo, argument
376 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
473 struct radeon_bo *src_bo, argument
515 if (src_bo == dst_bo) {
529 src_bo);
541 if (!validate_buffers(r200, src_bo, dst_bo))
547 …emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src…
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| D | r200_blit.h | 36 struct radeon_bo *src_bo,
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| D | radeon_mipmap_tree.c | 558 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; in radeon_validate_texture_miptree() local
559 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) { in radeon_validate_texture_miptree()
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| D | radeon_common_context.h | 443 struct radeon_bo *src_bo,
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| /third_party/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_blit.h | 63 drm_intel_bo *src_bo,
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| D | intel_blit.c | 577 drm_intel_bo *src_bo, in intel_emit_linear_blit() argument
592 pitch, src_bo, src_offset, I915_TILING_NONE, in intel_emit_linear_blit()
608 pitch, src_bo, src_offset, I915_TILING_NONE, in intel_emit_linear_blit()
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| D | intel_buffer_objects.c | 604 drm_intel_bo *src_bo, *dst_bo; in intel_bufferobj_copy_subdata() local
644 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset); in intel_bufferobj_copy_subdata()
648 src_bo, read_offset + src_offset, size); in intel_bufferobj_copy_subdata()
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| /third_party/mesa3d/src/broadcom/vulkan/ |
| D | v3dv_queue.c | 419 struct v3dv_bo *src_bo = info->buffer->mem->bo; in handle_copy_buffer_to_image_cpu_job() local
420 assert(!src_bo->map || src_bo->map_size == src_bo->size); in handle_copy_buffer_to_image_cpu_job()
421 if (!src_bo->map && !v3dv_bo_map(job->device, src_bo, src_bo->size)) in handle_copy_buffer_to_image_cpu_job()
423 void *src_ptr = src_bo->map; in handle_copy_buffer_to_image_cpu_job()
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| D | v3dv_meta_copy.c | 1192 struct v3dv_bo *src_bo = in v3dv_CmdUpdateBuffer() local
1194 if (!src_bo) { in v3dv_CmdUpdateBuffer()
1199 bool ok = v3dv_bo_map(cmd_buffer->device, src_bo, src_bo->size); in v3dv_CmdUpdateBuffer()
1205 memcpy(src_bo->map, pData, dataSize); in v3dv_CmdUpdateBuffer()
1207 v3dv_bo_unmap(cmd_buffer->device, src_bo); in v3dv_CmdUpdateBuffer()
1218 src_bo, 0, ®ion); in v3dv_CmdUpdateBuffer()
1224 cmd_buffer, (uint64_t)(uintptr_t)src_bo, destroy_update_buffer_cb); in v3dv_CmdUpdateBuffer()
1330 const struct v3dv_bo *src_bo = buffer->mem->bo; in copy_buffer_to_image_tfu() local
1345 src_bo->handle != dst_bo->handle ? src_bo->handle : 0 in copy_buffer_to_image_tfu()
1353 const uint32_t src_offset = src_bo->offset + buffer_offset; in copy_buffer_to_image_tfu()
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| D | v3dvx_meta_common.c | 835 const struct v3dv_bo *src_bo = src->mem->bo; in v3dX() local
841 src_bo->handle != dst_bo->handle ? src_bo->handle : 0 in v3dX()
846 src_bo->offset + v3dv_layer_offset(src, src_mip_level, src_layer); in v3dX()
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| /third_party/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_buffer_objects.c | 677 struct brw_bo *src_bo, *dst_bo; in brw_copy_buffer_subdata() local
683 src_bo = brw_bufferobj_buffer(brw, intel_src, read_offset, size, false); in brw_copy_buffer_subdata()
686 src_bo, read_offset, in brw_copy_buffer_subdata()
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| D | brw_blorp.c | 530 struct brw_bo *src_bo, in brw_blorp_copy_buffers() argument
537 __func__, size, src_bo, src_offset, dst_bo, dst_offset); in brw_blorp_copy_buffers()
540 struct blorp_address src = { .buffer = src_bo, .offset = src_offset }; in brw_blorp_copy_buffers()
958 struct brw_bo *src_bo = in brw_blorp_upload_miptree() local
963 if (src_bo == NULL) in brw_blorp_upload_miptree()
990 brw_miptree_create_for_bo(brw, src_bo, src_format, in brw_blorp_upload_miptree()
1024 brw_bo_unreference(src_bo); in brw_blorp_upload_miptree()
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| D | brw_blorp.h | 64 struct brw_bo *src_bo,
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| /third_party/mesa3d/src/gallium/drivers/iris/ |
| D | iris_screen.h | 101 struct iris_bo *src_bo, uint32_t src_offset,
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| D | iris_state.c | 606 struct iris_bo *src_bo, uint32_t src_offset, in iris_copy_mem_mem() argument
619 cp.SourceMemoryAddress = ro_bo(src_bo, src_offset + i); in iris_copy_mem_mem()
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| D | crocus_screen.h | 106 struct crocus_bo *src_bo, uint32_t src_offset,
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_emit.c | 929 struct fd_bo *src_bo = fd_resource(src)->bo; in fd4_mem_to_mem() local
937 OUT_RELOC(ring, src_bo, src_off, 0, 0); in fd4_mem_to_mem()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_emit.c | 1173 struct fd_bo *src_bo = fd_resource(src)->bo; in fd5_mem_to_mem() local
1181 OUT_RELOC(ring, src_bo, src_off, 0, 0); in fd5_mem_to_mem()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_emit.c | 1353 struct fd_bo *src_bo = fd_resource(src)->bo; in fd6_mem_to_mem() local
1361 OUT_RELOC(ring, src_bo, src_off, 0, 0); in fd6_mem_to_mem()
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