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Searched refs:surf_index (Results 1 – 20 of 20) sorted by relevance

/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dgfx6_sol.c53 const int surf_index = BRW_GFX6_SOL_BINDING_START + i; in gfx6_update_sol_surfaces() local
62 &brw->gs.base.surf_offset[surf_index], in gfx6_update_sol_surfaces()
68 &brw->ff_gs.surf_offset[surf_index], in gfx6_update_sol_surfaces()
74 brw->ff_gs.surf_offset[surf_index] = 0; in gfx6_update_sol_surfaces()
76 brw->gs.base.surf_offset[surf_index] = 0; in gfx6_update_sol_surfaces()
Dgfx6_constant_state.c239 uint32_t surf_index = prog_data->binding_table.pull_constants_start; in brw_upload_pull_constants() local
242 if (stage_state->surf_offset[surf_index]) { in brw_upload_pull_constants()
243 stage_state->surf_offset[surf_index] = 0; in brw_upload_pull_constants()
275 brw_emit_buffer_surface_state(brw, &stage_state->surf_offset[surf_index], in brw_upload_pull_constants()
Dbrw_wm_surface_state.c141 uint32_t *surf_offset, int surf_index, in brw_emit_surface_state() argument
233 uint32_t surf_index) in gfx6_update_renderbuffer_surface() argument
261 &offset, surf_index, in gfx6_update_renderbuffer_surface()
586 const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; in brw_update_texture_surface() local
618 surf_offset, surf_index, in brw_update_texture_surface()
917 uint32_t surf_index) in gfx4_update_renderbuffer_surface() argument
1095 const unsigned surf_index = in update_renderbuffer_read_surfaces() local
1097 uint32_t *surf_offset = &brw->wm.base.surf_offset[surf_index]; in update_renderbuffer_read_surfaces()
1137 surf_offset, surf_index, in update_renderbuffer_read_surfaces()
1591 const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; in update_image_surface() local
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/third_party/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c100 config.info.surf_index = &ws->surf_index_color; in amdgpu_surface_init()
104 config.info.surf_index = NULL; in amdgpu_surface_init()
/third_party/mesa3d/src/intel/compiler/
Dbrw_vec4_nir.cpp383 src_reg surf_index; in get_nir_ssbo_intrinsic_index() local
387 surf_index = brw_imm_ud(index); in get_nir_ssbo_intrinsic_index()
389 surf_index = src_reg(this, glsl_type::uint_type); in get_nir_ssbo_intrinsic_index()
390 emit(ADD(dst_reg(surf_index), get_nir_src(instr->src[src], 1), in get_nir_ssbo_intrinsic_index()
392 surf_index = emit_uniformize(surf_index); in get_nir_ssbo_intrinsic_index()
395 return surf_index; in get_nir_ssbo_intrinsic_index()
470 src_reg surf_index = get_nir_ssbo_intrinsic_index(instr); in nir_emit_intrinsic() local
518 emit_untyped_write(bld, surf_index, offset_reg, val_reg, in nir_emit_intrinsic()
530 src_reg surf_index = get_nir_ssbo_intrinsic_index(instr); in nir_emit_intrinsic() local
538 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg, in nir_emit_intrinsic()
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Dbrw_vec4_generator.cpp1278 uint32_t surf_index = index.ud; in generate_pull_constant_load() local
1320 brw_dp_read_desc(devinfo, surf_index, in generate_pull_constant_load()
1331 struct brw_reg surf_index) in generate_get_buffer_size() argument
1334 assert(surf_index.type == BRW_REGISTER_TYPE_UD && in generate_get_buffer_size()
1335 surf_index.file == BRW_IMMEDIATE_VALUE); in generate_get_buffer_size()
1341 surf_index.ud, in generate_get_buffer_size()
1355 struct brw_reg surf_index, in generate_pull_constant_load_gfx7() argument
1359 assert(surf_index.type == BRW_REGISTER_TYPE_UD); in generate_pull_constant_load_gfx7()
1361 if (surf_index.file == BRW_IMMEDIATE_VALUE) { in generate_pull_constant_load_gfx7()
1369 brw_sampler_desc(devinfo, surf_index.ud, in generate_pull_constant_load_gfx7()
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Dbrw_fs_generator.cpp380 const uint32_t surf_index = inst->target; in fire_fb_write() local
386 surf_index, in fire_fb_write()
447 const unsigned surf_index = inst->target; in generate_fb_read() local
449 gfx9_fb_READ(p, dst, payload, surf_index, in generate_fb_read()
1042 struct brw_reg surf_index) in generate_get_buffer_size() argument
1045 assert(surf_index.file == BRW_IMMEDIATE_VALUE); in generate_get_buffer_size()
1070 surf_index.ud, in generate_get_buffer_size()
1622 uint32_t surf_index = index.ud; in generate_uniform_pull_constant_load() local
1629 read_offset, surf_index); in generate_uniform_pull_constant_load()
1643 const uint32_t surf_index = index.ud; in generate_uniform_pull_constant_load_gfx7() local
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Dbrw_fs.h117 const fs_reg &surf_index,
509 struct brw_reg surf_index);
523 struct brw_reg surf_index,
Dbrw_fs_nir.cpp4099 fs_reg surf_index = image; in get_nir_image_intrinsic_image() local
4103 surf_index = in get_nir_image_intrinsic_image()
4106 surf_index = vgrf(glsl_type::uint_type); in get_nir_image_intrinsic_image()
4107 bld.ADD(surf_index, image, in get_nir_image_intrinsic_image()
4112 return bld.emit_uniformize(surf_index); in get_nir_image_intrinsic_image()
4130 fs_reg surf_index = vgrf(glsl_type::uint_type); in get_nir_ssbo_intrinsic_index() local
4131 bld.ADD(surf_index, get_nir_src(instr->src[src]), in get_nir_ssbo_intrinsic_index()
4133 return bld.emit_uniformize(surf_index); in get_nir_ssbo_intrinsic_index()
4690 fs_reg surf_index; in nir_emit_intrinsic() local
4694 surf_index = brw_imm_ud(index); in nir_emit_intrinsic()
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Dbrw_vec4.h301 src_reg surf_index,
Dbrw_vec4_visitor.cpp733 src_reg surf_index, in emit_pull_constant_load_reg() argument
757 surf_index, in emit_pull_constant_load_reg()
763 surf_index, in emit_pull_constant_load_reg()
Dbrw_eu.h1661 uint32_t surf_index);
Dbrw_eu_emit.c3613 uint32_t surf_index) in brw_shader_time_add() argument
3639 brw_inst_set_binding_table_index(devinfo, send, surf_index); in brw_shader_time_add()
Dbrw_fs.cpp167 const fs_reg &surf_index, in VARYING_PULL_CONSTANT_LOAD() argument
194 vec4_result, surf_index, vec4_offset, in VARYING_PULL_CONSTANT_LOAD()
/third_party/mesa3d/src/amd/common/
Dac_surface.h406 uint32_t *surf_index; /* Set a monotonic counter for tile swizzling. */ member
Dac_surface.c864 if ((info->chip_class >= GFX7 || config->info.levels == 1) && config->info.surf_index && in gfx6_surface_settings()
874 AddrBaseSwizzleIn.surfIndex = p_atomic_inc_return(config->info.surf_index) - 1; in gfx6_surface_settings()
1779 if (config->info.surf_index && in->swizzleMode >= ADDR_SW_64KB_Z_T && !out.mipChainInTail && in gfx9_compute_miptree()
1787 xin.surfIndex = p_atomic_inc_return(config->info.surf_index) - 1; in gfx9_compute_miptree()
/third_party/mesa3d/docs/relnotes/
D18.2.8.rst132 - radv: don't set surf_index for stencil-only images
D18.3.2.rst205 - radv: don't set surf_index for stencil-only images
D19.0.0.rst2073 - radv: don't set surf_index for stencil-only images
/third_party/mesa3d/src/amd/vulkan/
Dradv_image.c527 image->info.surf_index = NULL; in radv_patch_image_from_extra_info()
1757 image->info.surf_index = &device->image_mrt_offset_counter; in radv_image_create()