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Searched refs:tess_offchip_ring_size (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_shaders.c3899 sctx->screen->tess_offchip_ring_size + sctx->screen->tess_factor_ring_size, 1 << 19); in si_init_tess_factor_ring()
3908 sctx->screen->tess_offchip_ring_size + sctx->screen->tess_factor_ring_size, 1 << 19); in si_init_tess_factor_ring()
3912 si_resource(sctx->tess_rings)->gpu_address + sctx->screen->tess_offchip_ring_size; in si_init_tess_factor_ring()
3972 si_resource(sctx->tess_rings_tmz)->gpu_address + sctx->screen->tess_offchip_ring_size; in si_init_tess_factor_ring()
Dsi_pipe.h530 unsigned tess_offchip_ring_size; member
Dsi_shader_llvm_tess.c353 unsigned tf_offset = ctx->screen->tess_offchip_ring_size; in get_tess_ring_descriptor()
Dsi_pipe.c1244 sscreen->tess_offchip_ring_size = max_offchip_buffers * sscreen->tess_offchip_block_dw_size * 4; in radeonsi_screen_create_impl()
/third_party/mesa3d/src/amd/vulkan/
Dradv_device.c3371 uint32_t tess_offchip_ring_size, struct radeon_winsys_bo *tess_rings_bo) in fill_geom_tess_rings() argument
3476 desc[6] = tess_offchip_ring_size; in fill_geom_tess_rings()
3758 unsigned tess_factor_ring_size = 0, tess_offchip_ring_size = 0; in radv_get_preamble_cs() local
3783 tess_offchip_ring_size = max_offchip_buffers * queue->device->tess_offchip_block_dw_size * 4; in radv_get_preamble_cs()
3864 queue->device->ws, tess_offchip_ring_offset + tess_offchip_ring_size, 256, in radv_get_preamble_cs()
3934 tess_offchip_ring_offset, tess_offchip_ring_size, tess_rings_bo); in radv_get_preamble_cs()